diff options
| author | Oleg Perelet <operelet@codeaurora.org> | 2016-04-28 11:16:35 -0700 |
|---|---|---|
| committer | Kyle Yan <kyan@codeaurora.org> | 2016-04-29 14:41:49 -0700 |
| commit | 8972d5e96e22546fbe5fb20a03825fcb1d06f113 (patch) | |
| tree | 57a86ab3b59c5230e07c6428e11a0c574018281c /drivers/gpu/msm | |
| parent | 7ea155dd2d4cea274a0320954bd656d9006bd9c2 (diff) | |
msm: kgsl: Explicitly set ISENSE clock rate for A540.
On A540 ISENSE clock rate is controlled by GPU driver.
CRs-Fixed: 973565
Change-Id: Iab40cff01b6e65db51a4b793572714d2059a78ad
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
Diffstat (limited to 'drivers/gpu/msm')
| -rw-r--r-- | drivers/gpu/msm/kgsl_pwrctrl.c | 7 | ||||
| -rw-r--r-- | drivers/gpu/msm/kgsl_pwrctrl.h | 2 |
2 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c index d58645764c55..f9b5545519cb 100644 --- a/drivers/gpu/msm/kgsl_pwrctrl.c +++ b/drivers/gpu/msm/kgsl_pwrctrl.c @@ -1685,6 +1685,7 @@ static int _get_clocks(struct kgsl_device *device) const char *name; struct property *prop; + pwr->isense_clk_indx = 0; of_property_for_each_string(dev->of_node, "clock-names", prop, name) { int i; @@ -1703,6 +1704,8 @@ static int _get_clocks(struct kgsl_device *device) return ret; } + if (!strcmp(name, "isense_clk")) + pwr->isense_clk_indx = i; break; } } @@ -1785,6 +1788,10 @@ int kgsl_pwrctrl_init(struct kgsl_device *device) clk_set_rate(pwr->grp_clks[6], clk_round_rate(pwr->grp_clks[6], KGSL_RBBMTIMER_CLK_FREQ)); + if (pwr->isense_clk_indx) + clk_set_rate(pwr->grp_clks[pwr->isense_clk_indx], + KGSL_ISENSE_CLK_FREQ); + result = get_regulators(device); if (result) return result; diff --git a/drivers/gpu/msm/kgsl_pwrctrl.h b/drivers/gpu/msm/kgsl_pwrctrl.h index 13f0afb4f52c..7ed76760c043 100644 --- a/drivers/gpu/msm/kgsl_pwrctrl.h +++ b/drivers/gpu/msm/kgsl_pwrctrl.h @@ -36,6 +36,7 @@ #define KGSL_CONSTRAINT_PWR_MAXLEVELS 2 #define KGSL_RBBMTIMER_CLK_FREQ 19200000 +#define KGSL_ISENSE_CLK_FREQ 200000000 /* Symbolic table for the constraint type */ #define KGSL_CONSTRAINT_TYPES \ @@ -162,6 +163,7 @@ struct kgsl_pwrctrl { struct clk *grp_clks[KGSL_MAX_CLKS]; struct clk *dummy_mx_clk; struct clk *gpu_bimc_int_clk; + int isense_clk_indx; unsigned long power_flags; unsigned long ctrl_flags; struct kgsl_pwrlevel pwrlevels[KGSL_MAX_PWRLEVELS]; |