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authorDamien Lespiau <damien.lespiau@intel.com>2015-01-16 18:07:26 +0000
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-01-27 09:50:59 +0100
commitba1c554c1fc8d0730ee9aababba7ebf5bb22381e (patch)
tree411ff7f833cd4b2568274dd2f36697c5ebf11aa5 /drivers/gpu
parentb6fef0ef126eb3f32fedab8a8840d8b65848d675 (diff)
drm/i915/skl: Retrieve the frequency limits
v2: Use the new function, gen6_init_rps_frequencies() (Damien) Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> (v1) Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b221105dc907..6ae8e4ddb1c5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4031,6 +4031,8 @@ static void gen9_enable_rps(struct drm_device *dev)
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
+ gen6_init_rps_frequencies(dev);
+
I915_WRITE(GEN6_RPNSWREQ, 0xc800000);
I915_WRITE(GEN6_RC_VIDEO_FREQ, 0xc800000);