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authorHema HK <hemahk@ti.com>2010-12-10 17:55:37 +0530
committerFelipe Balbi <balbi@ti.com>2010-12-10 14:43:06 +0200
commit77b1d3fa88dcb9d6e885926f972c421e4069b849 (patch)
tree8d3a68743cebb09c37695eca493c9ee3b5fbd6d4 /drivers/mfd
parent4bc36fd31b07054bdf7378cca7162c10598f3eff (diff)
mfd: TWL6030: USBOTG VBUS event generation on
With TWL6030-usb, VBUS SESS_VLD and SESS_END events are not generated as expected. When these interrupts are enabled, charger VBUS detection interrupt does not get generated. So USBOTG has to be dependent on charger VBUS interrupts. So added one bit for USBOTG and changed the handler to call the USBOTG handler whenever there is a charger VBUS interrpt. VBUS SESS_VLD and SESS_END event generation issue is under debug with HW team. This fix might not be required once after fixing the issue. Signed-off-by: Balaji TK <balajitk@ti.com> Signed-off-by: Hema HK <hemahk@ti.com> Cc: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/mfd')
-rw-r--r--drivers/mfd/twl6030-irq.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/mfd/twl6030-irq.c b/drivers/mfd/twl6030-irq.c
index aaedb11d9d2c..06c8955907e9 100644
--- a/drivers/mfd/twl6030-irq.c
+++ b/drivers/mfd/twl6030-irq.c
@@ -74,7 +74,7 @@ static int twl6030_interrupt_mapping[24] = {
USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */
USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */
USBOTG_INTR_OFFSET, /* Bit 18 ID */
- USBOTG_INTR_OFFSET, /* Bit 19 VBUS */
+ USB_PRES_INTR_OFFSET, /* Bit 19 VBUS */
CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */
CHARGER_INTR_OFFSET, /* Bit 21 EXT_CHRG */
CHARGER_INTR_OFFSET, /* Bit 22 INT_CHRG */
@@ -128,6 +128,13 @@ static int twl6030_irq_thread(void *data)
sts.bytes[3] = 0; /* Only 24 bits are valid*/
+ /*
+ * Since VBUS status bit is not reliable for VBUS disconnect
+ * use CHARGER VBUS detection status bit instead.
+ */
+ if (sts.bytes[2] & 0x10)
+ sts.bytes[2] |= 0x08;
+
for (i = 0; sts.int_sts; sts.int_sts >>= 1, i++) {
local_irq_disable();
if (sts.int_sts & 0x1) {