diff options
| author | Stepan Moskovchenko <stepanm@codeaurora.org> | 2013-09-13 22:19:33 -0700 |
|---|---|---|
| committer | Subhash Jadavani <subhashj@codeaurora.org> | 2016-05-27 10:28:54 -0700 |
| commit | 6d26067be7decc88beec36e6081507632cad15e1 (patch) | |
| tree | e806c7d28709c8f0a40c2f47ae15893946369e96 /drivers/mmc | |
| parent | c2037aa944ca2f3decbefa620d4392652b51f286 (diff) | |
mmc: sdhci-msm: set core in proper mode before reset
During probe disable the HC mode since the reset is done in
SDCC mode. HC mode will get set after the reset is complete
before the rest of the initialization is done.
Change-Id: I1fdc633c218447c15c8caad24e2805e7510088f2
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/sdhci-msm.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 3c5e546016b6..e8c4279c1cbd 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -2798,6 +2798,9 @@ static int sdhci_msm_probe(struct platform_device *pdev) goto vreg_deinit; } + /* Unset HC_MODE_EN bit in HC_MODE register */ + writel_relaxed(0, (msm_host->core_mem + CORE_HC_MODE)); + /* Set SW_RST bit in POWER register (Offset 0x0) */ writel_relaxed(readl_relaxed(msm_host->core_mem + CORE_POWER) | CORE_SW_RST, msm_host->core_mem + CORE_POWER); |