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authorWolfgang Grandegger <wg@grandegger.com>2011-12-12 16:09:28 +0100
committerMarc Kleine-Budde <mkl@pengutronix.de>2012-02-03 00:24:50 +0100
commit6e9d554fa6e481a848358c215f129432262123c0 (patch)
tree74929f3f9fe8e3108f214ad28d60bbbb4762ca8b /drivers/net/can
parentba7605745d5c99f0e71b3ec6c7cb5ed6afe540ad (diff)
can: flexcan: fix irq flooding by clearing all interrupt sources
As pointed out by Reuben Dowle and Lothar Waßmann, the TWRN_INT, RWRN_INT, BOFF_INT interrupt sources need to be cleared as well to avoid interrupt flooding, at least for the Flexcan on i.MX28 SOCs. Furthermore, the interrupts are only cleared, if really one of those interrupt sources are pending (which is not the case for rx and tx done). Cc: Reuben Dowle <Reuben.Dowle@navico.com> Cc: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'drivers/net/can')
-rw-r--r--drivers/net/can/flexcan.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 7fd8089946fb..96d235799ec1 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -118,6 +118,9 @@
(FLEXCAN_ESR_TWRN_INT | FLEXCAN_ESR_RWRN_INT | FLEXCAN_ESR_BOFF_INT)
#define FLEXCAN_ESR_ERR_ALL \
(FLEXCAN_ESR_ERR_BUS | FLEXCAN_ESR_ERR_STATE)
+#define FLEXCAN_ESR_ALL_INT \
+ (FLEXCAN_ESR_TWRN_INT | FLEXCAN_ESR_RWRN_INT | \
+ FLEXCAN_ESR_BOFF_INT | FLEXCAN_ESR_ERR_INT)
/* FLEXCAN interrupt flag register (IFLAG) bits */
#define FLEXCAN_TX_BUF_ID 8
@@ -577,7 +580,9 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
reg_iflag1 = flexcan_read(&regs->iflag1);
reg_esr = flexcan_read(&regs->esr);
- flexcan_write(FLEXCAN_ESR_ERR_INT, &regs->esr); /* ACK err IRQ */
+ /* ACK all bus error and state change IRQ sources */
+ if (reg_esr & FLEXCAN_ESR_ALL_INT)
+ flexcan_write(reg_esr & FLEXCAN_ESR_ALL_INT, &regs->esr);
/*
* schedule NAPI in case of: