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author | Tony Truong <truong@codeaurora.org> | 2015-03-09 13:48:04 -0700 |
---|---|---|
committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-22 11:09:12 -0700 |
commit | 55820fda330aeb6389f68893870d48ad883eae29 (patch) | |
tree | 7e83398861637ede236600c3305d732417d8f792 /drivers/pci/host | |
parent | 3787c82d2191f925c51b756cf15a23a90099870f (diff) |
msm: pcie: correct the offset of a PCIe AXI register
Correct the offset of a PCIe AXI register.
Change-Id: I429c3e42cc8bb6cc7e23b5e461e51ec10435a89d
Signed-off-by: Tony Truong <truong@codeaurora.org>
Diffstat (limited to 'drivers/pci/host')
-rw-r--r-- | drivers/pci/host/pci-msm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/host/pci-msm.c b/drivers/pci/host/pci-msm.c index a0e1550c430c..8cb854f1430c 100644 --- a/drivers/pci/host/pci-msm.c +++ b/drivers/pci/host/pci-msm.c @@ -155,7 +155,7 @@ #define PCIE20_PARF_DBI_BASE_ADDR 0x168 #define PCIE20_PARF_SLV_ADDR_SPACE_SIZE 0x16C #define PCIE20_PARF_MHI_CLOCK_RESET_CTRL 0x174 -#define PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT 0x178 +#define PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT 0x1A8 #define PCIE20_PARF_LTSSM 0x1B0 #define PCIE20_ELBI_VERSION 0x00 |