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author | Vijayavardhan Vennapusa <vvreddy@codeaurora.org> | 2016-12-06 12:04:21 +0530 |
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committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2016-12-12 23:20:32 -0800 |
commit | 4c551536eeb6828378bbdad5f1a6d4a387debfed (patch) | |
tree | e72459fe2757f2d9008bd7276b9112c773103bb2 /drivers/scsi/libsas | |
parent | a80e267a8c0d61790c3d1d5f7181ebd1be39c438 (diff) |
USB: dwc3: msm: Fail probe if core-clk-rate is not passed from dts
Currently USB driver is not failing probe if USB core-clk-rate property
is not exist. This leads to USB enumeration failures across connect/
disconnect. Hence make core-clk-rate property mandatory and if in case
not defined, fail the probe. Also Fail probe if extcon property not
defined in case of OTG mode.
Also return error if dwc3_core_pre_init() fails during dwc3-msm_resume()
due to phy init fails and don't go ahead with setting up event buffers
as event buffers allocation is done.
Change-Id: I3927ad2f670e45acd10f8568857cf9f3434df657
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Diffstat (limited to 'drivers/scsi/libsas')
0 files changed, 0 insertions, 0 deletions