diff options
| author | Subhash Jadavani <subhashj@codeaurora.org> | 2015-04-21 17:19:03 -0700 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-22 10:59:35 -0700 |
| commit | 30fd811fb78f7556e0055aae5dcf88a76289eb77 (patch) | |
| tree | 120c4c8e8622f7b5cd18921216bbd5cbb6c5b1b7 /drivers/scsi/ufs | |
| parent | 5d37480381c0ff065a3a96a5f2165014584acd9b (diff) | |
scsi: ufs: fix another race between clock scaling and gating
Commit 4f98a9564b745f3b0b1bea02d351c9f8f2f17d39 (scsi: ufs: fix race
between clock gating and scaling work) tried to fix the race condition
between clock gating and scaling work but it didn't fixed the race in
all possible states. This change fixes the race condition by making
sure that we hold the clock reference even if clocks are ON when we
entered into clock scaling work.
Change-Id: Ic3cf9224f5afb2900fe2553ce8c302cc8b20e623
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Diffstat (limited to 'drivers/scsi/ufs')
| -rw-r--r-- | drivers/scsi/ufs/ufshcd.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index bb5fe33acca8..2d104f3afafa 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -8484,16 +8484,18 @@ static int ufshcd_devfreq_target(struct device *dev, return 0; } - if (ufshcd_is_clkgating_allowed(hba) && - (hba->clk_gating.state != CLKS_ON)) { - if (cancel_delayed_work(&hba->clk_gating.gate_work)) { + if (ufshcd_is_clkgating_allowed(hba)) { + if (cancel_delayed_work(&hba->clk_gating.gate_work) || + (hba->clk_gating.state == CLKS_ON)) { /* hold the vote until the scaling work is completed */ hba->clk_gating.active_reqs++; release_clk_hold = true; - hba->clk_gating.state = CLKS_ON; - trace_ufshcd_clk_gating(dev_name(hba->dev), - ufschd_clk_gating_state_to_string( - hba->clk_gating.state)); + if (hba->clk_gating.state != CLKS_ON) { + hba->clk_gating.state = CLKS_ON; + trace_ufshcd_clk_gating(dev_name(hba->dev), + ufschd_clk_gating_state_to_string( + hba->clk_gating.state)); + } } else { /* * Clock gating work seems to be running in parallel |