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authorVenkat Gopalakrishnan <venkatg@codeaurora.org>2016-09-01 17:54:54 -0700
committerVenkat Gopalakrishnan <venkatg@codeaurora.org>2016-09-12 16:00:53 -0700
commit98e5fbba6aae2c22de939393ebdc0c85169f14ac (patch)
tree30e57d88d11020084b1c1dafbc98df25f887ce0e /drivers/scsi/ufs
parent9c8924dbaadbb194f6d0bf30fa7fafde20ec096c (diff)
scsi: ufs-qcom: configure ufs clocks core memory
Configure the ufs clocks core and peripheral memory state when turned off. This configuration is required to allow retaining ICE crypto configuration (including keys) when ice_core_clk is turned off, and powering down non-ICE RAMs of host controller. Change-Id: I93584851fd50c7006ccd48979087d707ab4c6408 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Diffstat (limited to 'drivers/scsi/ufs')
-rw-r--r--drivers/scsi/ufs/ufs-qcom.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c
index a3bcfb42ca6a..23c32f2743c3 100644
--- a/drivers/scsi/ufs/ufs-qcom.c
+++ b/drivers/scsi/ufs/ufs-qcom.c
@@ -349,6 +349,28 @@ out:
return err;
}
+static void ufs_qcom_force_mem_config(struct ufs_hba *hba)
+{
+ struct ufs_clk_info *clki;
+
+ /*
+ * Configure the behavior of ufs clocks core and peripheral
+ * memory state when they are turned off.
+ * This configuration is required to allow retaining
+ * ICE crypto configuration (including keys) when
+ * core_clk_ice is turned off, and powering down
+ * non-ICE RAMs of host controller.
+ */
+ list_for_each_entry(clki, &hba->clk_list_head, list) {
+ if (!strcmp(clki->name, "core_clk_ice"))
+ clk_set_flags(clki->clk, CLKFLAG_RETAIN_MEM);
+ else
+ clk_set_flags(clki->clk, CLKFLAG_NORETAIN_MEM);
+ clk_set_flags(clki->clk, CLKFLAG_NORETAIN_PERIPH);
+ clk_set_flags(clki->clk, CLKFLAG_PERIPH_OFF_CLEAR);
+ }
+}
+
static int ufs_qcom_hce_enable_notify(struct ufs_hba *hba,
enum ufs_notify_change_status status)
{
@@ -357,6 +379,7 @@ static int ufs_qcom_hce_enable_notify(struct ufs_hba *hba,
switch (status) {
case PRE_CHANGE:
+ ufs_qcom_force_mem_config(hba);
ufs_qcom_power_up_sequence(hba);
/*
* The PHY PLL output is the source of tx/rx lane symbol