diff options
| author | Amir Samuelov <amirs@codeaurora.org> | 2016-09-28 09:27:03 +0300 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2016-09-27 23:33:48 -0700 |
| commit | 82bf612671251632c1a327c6161b64b0be152387 (patch) | |
| tree | 80097c0e789806e714e24d88aa3b3fea7030f74f /drivers/soc | |
| parent | 626caf4e54864d90e8d104277f9a1446e487c7e1 (diff) | |
soc: qcom: pil: add PBL spare error status
The PBL spare status registers provide more info
about the reason for PBL failure.
Change-Id: I1dddc7df26caa1556e57128603afd32b2613ebde
Signed-off-by: Amir Samuelov <amirs@codeaurora.org>
Diffstat (limited to 'drivers/soc')
| -rw-r--r-- | drivers/soc/qcom/subsys-pil-tz.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/drivers/soc/qcom/subsys-pil-tz.c b/drivers/soc/qcom/subsys-pil-tz.c index ae175e176aa3..1fa731776926 100644 --- a/drivers/soc/qcom/subsys-pil-tz.c +++ b/drivers/soc/qcom/subsys-pil-tz.c @@ -917,8 +917,24 @@ static void check_pbl_done(struct pil_tz_data *d) err_value = __raw_readl(d->err_status); pr_debug("PBL_DONE received from %s!\n", d->subsys_desc.name); - if (err_value) + if (err_value) { + uint32_t rmb_err_spare0; + uint32_t rmb_err_spare1; + uint32_t rmb_err_spare2; + + rmb_err_spare2 = __raw_readl(d->err_status_spare); + rmb_err_spare1 = __raw_readl(d->err_status_spare-4); + rmb_err_spare0 = __raw_readl(d->err_status_spare-8); + pr_err("PBL error status register: 0x%08x\n", err_value); + + pr_err("PBL error status spare0 register: 0x%08x\n", + rmb_err_spare0); + pr_err("PBL error status spare1 register: 0x%08x\n", + rmb_err_spare1); + pr_err("PBL error status spare2 register: 0x%08x\n", + rmb_err_spare2); + } __raw_writel(BIT(d->bits_arr[PBL_DONE]), d->irq_clear); } |