diff options
author | Vijayavardhan Vennapusa <vvreddy@codeaurora.org> | 2016-01-08 15:58:35 +0530 |
---|---|---|
committer | Vamsi Krishna Samavedam <vskrishn@codeaurora.org> | 2016-08-08 17:13:14 -0700 |
commit | cb816a1033f348a84297aaa024edbd3ef76e5fd3 (patch) | |
tree | 2f42c1fea6a9a589436a71b65f1a48b7647b92ee /drivers/usb/dwc3 | |
parent | 28352998dee80f33641dd7b28479350bd480b823 (diff) |
USB: dwc3-msm: Add support for setting specific frequency for core clock
Add support for setting USB core clock to particular frequency so that
core clock frequency can be passed through dts property.
Change-Id: If9ff41037d22d7be7f09c9468e8d4cc92280a28e
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Diffstat (limited to 'drivers/usb/dwc3')
-rw-r--r-- | drivers/usb/dwc3/dwc3-msm.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/drivers/usb/dwc3/dwc3-msm.c b/drivers/usb/dwc3/dwc3-msm.c index 4d35de1c14c5..ef0a793e5bec 100644 --- a/drivers/usb/dwc3/dwc3-msm.c +++ b/drivers/usb/dwc3/dwc3-msm.c @@ -2338,14 +2338,23 @@ static int dwc3_msm_get_clk_gdsc(struct dwc3_msm *mdwc) return ret; } - /* - * Get Max supported clk frequency for USB Core CLK and request - * to set the same. - */ - mdwc->core_clk_rate = clk_round_rate(mdwc->core_clk, LONG_MAX); + if (!of_property_read_u32(mdwc->dev->of_node, "qcom,core-clk-rate", + (u32 *)&mdwc->core_clk_rate)) { + mdwc->core_clk_rate = clk_round_rate(mdwc->core_clk, + mdwc->core_clk_rate); + } else { + /* + * Get Max supported clk frequency for USB Core CLK and request + * to set the same. + */ + mdwc->core_clk_rate = clk_round_rate(mdwc->core_clk, LONG_MAX); + } + if (IS_ERR_VALUE(mdwc->core_clk_rate)) { dev_err(mdwc->dev, "fail to get core clk max freq.\n"); } else { + dev_dbg(mdwc->dev, "USB core frequency = %ld\n", + mdwc->core_clk_rate); ret = clk_set_rate(mdwc->core_clk, mdwc->core_clk_rate); if (ret) dev_err(mdwc->dev, "fail to set core_clk freq:%d\n", |