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authorJack Pham <jackp@codeaurora.org>2016-12-09 11:19:04 -0800
committerJack Pham <jackp@codeaurora.org>2016-12-09 11:24:01 -0800
commita3e98f0134dab0ae0a137c3e0bab68c46c43d028 (patch)
tree78ec9afab31280cce2ca74960474ac5aff24d6b2 /drivers/usb
parent5142c18bae30439decd1c139999b54197e2aae91 (diff)
usb: phy: qmp: Select usb3 phy mode before initializing PHY
Make sure the USB3/DP PHY mode selection is switched back to USB3 mode before proceeding with PHY initialization. This fixes a bug when DisplayPort previously uses the PHY and does not switch it back which causes the POWER_DOWN_CONTROL register write to not take effect and results in USB3 PHY initialization failure. Change-Id: Idad0f80eda6192ccae9e824f1f76c7071806ffec Signed-off-by: Jack Pham <jackp@codeaurora.org>
Diffstat (limited to 'drivers/usb')
-rw-r--r--drivers/usb/phy/phy-msm-ssusb-qmp.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/usb/phy/phy-msm-ssusb-qmp.c b/drivers/usb/phy/phy-msm-ssusb-qmp.c
index fc61e3172d0b..64916f5566b5 100644
--- a/drivers/usb/phy/phy-msm-ssusb-qmp.c
+++ b/drivers/usb/phy/phy-msm-ssusb-qmp.c
@@ -307,13 +307,13 @@ static int msm_ssphy_qmp_init(struct usb_phy *uphy)
phy->clk_enabled = true;
}
- writel_relaxed(0x01,
- phy->base + phy->phy_reg[USB3_PHY_POWER_DOWN_CONTROL]);
-
/* select usb3 phy mode */
if (phy->tcsr_usb3_dp_phymode)
writel_relaxed(0x0, phy->tcsr_usb3_dp_phymode);
+ writel_relaxed(0x01,
+ phy->base + phy->phy_reg[USB3_PHY_POWER_DOWN_CONTROL]);
+
/* Make sure that above write completed to get PHY into POWER DOWN */
mb();