diff options
| author | Mayank Rana <mrana@codeaurora.org> | 2016-10-05 09:43:05 -0700 |
|---|---|---|
| committer | Hemant Kumar <hemantk@codeaurora.org> | 2016-10-10 12:16:14 -0700 |
| commit | fdf3e5f02cc34035ce50a9031658fdb7bef4bf9c (patch) | |
| tree | 736c7bf83f03fc5f23fe32148bda546980e24e9e /drivers/usb | |
| parent | 1fac7f53bdec193dfbaba8a9706075dc4d5ff756 (diff) | |
dwc3: gadget: Don't memset TRB ring with zero related to USB GSI endpoint
USB GSI endpoint related TRB ring is allocated with EP_OPS. Each USB
endpoint related TRB ring is zeroed with usb_ep_disable() operation. Hence
if USB composition switch or USB cable disconnect is performed when there
is active data transfer with USB GSI endpoint, it results into IPA GSI
accessing 0x0 address causing bus errors. Hence fix this issue by not
memsetting TRB ring with zero for USB GSI endpoint.
CRs-Fixed: 1072782
Change-Id: I92df514e31d5168b8dff4b249f4d8fd3e70c0118
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Diffstat (limited to 'drivers/usb')
| -rw-r--r-- | drivers/usb/dwc3/gadget.c | 22 |
1 files changed, 10 insertions, 12 deletions
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 4ad994972b19..805c5e1931e1 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -421,7 +421,16 @@ static void dwc3_free_trb_pool(struct dwc3_ep *dep) if (dep->endpoint.ep_type == EP_TYPE_GSI) return; - if (dep->trb_pool && dep->trb_pool_dma) { + /* + * Clean up ep ring to avoid getting xferInProgress due to stale trbs + * with HWO bit set from previous composition when update transfer cmd + * is issued. + */ + if (dep->number > 1 && dep->trb_pool && dep->trb_pool_dma) { + memset(&dep->trb_pool[0], 0, + sizeof(struct dwc3_trb) * dep->num_trbs); + dbg_event(dep->number, "Clr_TRB", 0); + dma_free_coherent(dwc->dev, sizeof(struct dwc3_trb) * DWC3_TRB_NUM, dep->trb_pool, dep->trb_pool_dma); @@ -723,17 +732,6 @@ static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep) (dep->number & 1) ? "in" : "out"); } - /* - * Clean up ep ring of non-control endpoint to avoid getting xferInProgress - * due to stale trbs with HWO bit set from previous composition when update - * transfer cmd is issued. - */ - if (dep->number > 1 && dep->trb_pool) { - memset(&dep->trb_pool[0], 0, - sizeof(struct dwc3_trb) * dep->num_trbs); - dbg_event(dep->number, "Clr_TRB", 0); - } - return 0; } |