msm: mdss: dp: add interrupt handling for PHY AUX errors

Add interrupt handling for PHY AUX errors that might
happen during AUX communication. Read the interrupt
status and clear it before initiating the next AUX
transaction. This will help identify any issues that
result in AUX transaction failures.

CRs-Fixed: 2006096
Change-Id: I0733bfb163c8c3c108002fbe4309e36dc105ccb8
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>

3 files changed, 41 insertions, 11 deletions

diff --git a/drivers/video/fbdev/msm/mdss_dp.h b/drivers/video/fbdev/msm/mdss_dp.h
index b01516847a7e..b1f20c3f9d2a 100644
--- a/drivers/video/fbdev/msm/mdss_dp.h
+++ b/drivers/video/fbdev/msm/mdss_dp.h
@@ -77,7 +77,7 @@
 #define EDP_INTR_I2C_NACK	BIT(18)
 #define EDP_INTR_I2C_DEFER	BIT(21)
 #define EDP_INTR_PLL_UNLOCKED	BIT(24)
-#define EDP_INTR_AUX_ERROR	BIT(27)
+#define EDP_INTR_PHY_AUX_ERR	BIT(27)
 
 
 #define EDP_INTR_STATUS1 \
@@ -85,7 +85,7 @@
 	EDP_INTR_WRONG_ADDR | EDP_INTR_TIMEOUT | \
 	EDP_INTR_NACK_DEFER | EDP_INTR_WRONG_DATA_CNT | \
 	EDP_INTR_I2C_NACK | EDP_INTR_I2C_DEFER | \
-	EDP_INTR_PLL_UNLOCKED | EDP_INTR_AUX_ERROR)
+	EDP_INTR_PLL_UNLOCKED | EDP_INTR_PHY_AUX_ERR)
 
 #define EDP_INTR_MASK1		(EDP_INTR_STATUS1 << 2)
 
@@ -692,6 +692,7 @@ enum dp_aux_error {
 	EDP_AUX_ERR_NACK	= -3,
 	EDP_AUX_ERR_DEFER	= -4,
 	EDP_AUX_ERR_NACK_DEFER	= -5,
+	EDP_AUX_ERR_PHY		= -6,
 };
 
 static inline char *mdss_dp_get_aux_error(u32 aux_error)
diff --git a/drivers/video/fbdev/msm/mdss_dp_aux.c b/drivers/video/fbdev/msm/mdss_dp_aux.c
index 17831fde9673..b53bd079fd72 100644
--- a/drivers/video/fbdev/msm/mdss_dp_aux.c
+++ b/drivers/video/fbdev/msm/mdss_dp_aux.c
@@ -73,6 +73,21 @@ static int dp_buf_trailing(struct edp_buf *eb)
 	return (int)(eb->end - eb->data);
 }
 
+static void mdss_dp_aux_clear_hw_interrupts(void __iomem *phy_base)
+{
+	u32 data;
+
+	data = dp_read(phy_base + DP_PHY_AUX_INTERRUPT_STATUS);
+	pr_debug("PHY_AUX_INTERRUPT_STATUS=0x%08x\n", data);
+
+	dp_write(phy_base + DP_PHY_AUX_INTERRUPT_CLEAR, 0x1f);
+	dp_write(phy_base + DP_PHY_AUX_INTERRUPT_CLEAR, 0x9f);
+	dp_write(phy_base + DP_PHY_AUX_INTERRUPT_CLEAR, 0);
+
+	/* Ensure that all interrupts are cleared and acked */
+	wmb();
+}
+
 /*
  * edp aux dp_buf_add_cmd:
  * NO native and i2c command mix allowed
@@ -299,14 +314,21 @@ int dp_aux_read(void *ep, struct edp_cmd *cmds)
 
 void dp_aux_native_handler(struct mdss_dp_drv_pdata *ep, u32 isr)
 {
-	if (isr & EDP_INTR_AUX_I2C_DONE)
+	pr_debug("isr=0x%08x\n", isr);
+	if (isr & EDP_INTR_AUX_I2C_DONE) {
 		ep->aux_error_num = EDP_AUX_ERR_NONE;
-	else if (isr & EDP_INTR_WRONG_ADDR)
+	} else if (isr & EDP_INTR_WRONG_ADDR) {
 		ep->aux_error_num = EDP_AUX_ERR_ADDR;
-	else if (isr & EDP_INTR_TIMEOUT)
+	} else if (isr & EDP_INTR_TIMEOUT) {
 		ep->aux_error_num = EDP_AUX_ERR_TOUT;
-	if (isr & EDP_INTR_NACK_DEFER)
+	} else if (isr & EDP_INTR_NACK_DEFER) {
 		ep->aux_error_num = EDP_AUX_ERR_NACK;
+	} else if (isr & EDP_INTR_PHY_AUX_ERR) {
+		ep->aux_error_num = EDP_AUX_ERR_PHY;
+		mdss_dp_aux_clear_hw_interrupts(ep->phy_io.base);
+	} else {
+		ep->aux_error_num = EDP_AUX_ERR_NONE;
+	}
 
 	complete(&ep->aux_comp);
 }
@@ -319,16 +341,22 @@ void dp_aux_i2c_handler(struct mdss_dp_drv_pdata *ep, u32 isr)
 		else
 			ep->aux_error_num = EDP_AUX_ERR_NONE;
 	} else {
-		if (isr & EDP_INTR_WRONG_ADDR)
+		if (isr & EDP_INTR_WRONG_ADDR) {
 			ep->aux_error_num = EDP_AUX_ERR_ADDR;
-		else if (isr & EDP_INTR_TIMEOUT)
+		} else if (isr & EDP_INTR_TIMEOUT) {
 			ep->aux_error_num = EDP_AUX_ERR_TOUT;
-		if (isr & EDP_INTR_NACK_DEFER)
+		} else if (isr & EDP_INTR_NACK_DEFER) {
 			ep->aux_error_num = EDP_AUX_ERR_NACK_DEFER;
-		if (isr & EDP_INTR_I2C_NACK)
+		} else if (isr & EDP_INTR_I2C_NACK) {
 			ep->aux_error_num = EDP_AUX_ERR_NACK;
-		if (isr & EDP_INTR_I2C_DEFER)
+		} else if (isr & EDP_INTR_I2C_DEFER) {
 			ep->aux_error_num = EDP_AUX_ERR_DEFER;
+		} else if (isr & EDP_INTR_PHY_AUX_ERR) {
+			ep->aux_error_num = EDP_AUX_ERR_PHY;
+			mdss_dp_aux_clear_hw_interrupts(ep->phy_io.base);
+		} else {
+			ep->aux_error_num = EDP_AUX_ERR_NONE;
+		}
 	}
 
 	complete(&ep->aux_comp);
diff --git a/drivers/video/fbdev/msm/mdss_dp_util.h b/drivers/video/fbdev/msm/mdss_dp_util.h
index 8f19e7cdf3cf..37cb515518e3 100644
--- a/drivers/video/fbdev/msm/mdss_dp_util.h
+++ b/drivers/video/fbdev/msm/mdss_dp_util.h
@@ -163,6 +163,7 @@
 #define DP_PHY_AUX_CFG9                         (0x00000040)
 #define DP_PHY_AUX_INTERRUPT_MASK               (0x00000044)
 #define DP_PHY_AUX_INTERRUPT_CLEAR              (0x00000048)
+#define DP_PHY_AUX_INTERRUPT_STATUS             (0x000000B8)
 
 #define DP_PHY_SPARE0				0x00A8