msm: kgsl: Invoke DCVS callbacks on A540

As long as GPMU is enabled, DCVS has to handshake with firmware.
It is a new requirement of A540 power management.

CRs-Fixed: 973565
Change-Id: Ie6480fc3ba0e1b95aab40e31b09ff2bd798ff30f
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>

3 files changed, 22 insertions, 7 deletions

diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 32c83ab76f09..24c5186340e5 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -1222,7 +1222,7 @@ static void _setup_throttling_counters(struct adreno_device *adreno_dev)
 	if (!adreno_is_a540(adreno_dev))
 		return;
 
-	if (!ADRENO_FEATURE(adreno_dev, ADRENO_LM))
+	if (!ADRENO_FEATURE(adreno_dev, ADRENO_GPMU))
 		return;
 
 	for (i = 0; i < ADRENO_GPMU_THROTTLE_COUNTERS; i++) {
@@ -1260,7 +1260,7 @@ static uint64_t _read_throttling_counters(struct adreno_device *adreno_dev)
 	if (!adreno_is_a540(adreno_dev))
 		return 0;
 
-	if (!ADRENO_FEATURE(adreno_dev, ADRENO_LM))
+	if (!ADRENO_FEATURE(adreno_dev, ADRENO_GPMU))
 		return 0;
 
 	for (i = 0; i < ADRENO_GPMU_THROTTLE_COUNTERS; i++) {
diff --git a/drivers/gpu/msm/adreno_a5xx.c b/drivers/gpu/msm/adreno_a5xx.c
index 42cbb07c4b30..ef3d5d8fc552 100644
--- a/drivers/gpu/msm/adreno_a5xx.c
+++ b/drivers/gpu/msm/adreno_a5xx.c
@@ -1845,7 +1845,7 @@ static void a540_lm_init(struct adreno_device *adreno_dev)
 {
 	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
 	uint32_t agc_lm_config =
-		((ADRENO_CHIPID_PATCH(adreno_dev->chipid) | 0x3)
+		((ADRENO_CHIPID_PATCH(adreno_dev->chipid) & 0x3)
 		<< AGC_GPU_VERSION_SHIFT);
 	unsigned int r, i;
 
@@ -1855,8 +1855,8 @@ static void a540_lm_init(struct adreno_device *adreno_dev)
 			AGC_THROTTLE_SEL_DCS;
 
 		kgsl_regread(device, A5XX_GPMU_TEMP_SENSOR_CONFIG, &r);
-		if (r & GPMU_BCL_ENABLED)
-			agc_lm_config |= AGC_BCL_ENABLED;
+		if (!(r & GPMU_BCL_ENABLED))
+			agc_lm_config |= AGC_BCL_DISABLED;
 
 		if (r & GPMU_LLM_ENABLED)
 			agc_lm_config |= AGC_LLM_ENABLED;
@@ -1905,6 +1905,9 @@ start_agc:
 	kgsl_regwrite(device, A5XX_GPMU_GPMU_PWR_THRESHOLD,
 		PWR_THRESHOLD_VALID | lm_limit(adreno_dev));
 
+	kgsl_regwrite(device, A5XX_GPMU_GPMU_VOLTAGE_INTR_EN_MASK,
+		VOLTAGE_INTR_EN);
+
 	if (lm_on(adreno_dev))
 		wake_llm(adreno_dev);
 }
@@ -1953,7 +1956,10 @@ static void a5xx_pwrlevel_change_settings(struct adreno_device *adreno_dev,
 {
 	int on = 0;
 
-	/* Only call through if PPD or LM is supported and enabled */
+	/*
+	 * On pre A540 HW only call through if PPD or LMx
+	 * is supported and enabled
+	 */
 	if (ADRENO_FEATURE(adreno_dev, ADRENO_PPD) &&
 		test_bit(ADRENO_PPD_CTRL, &adreno_dev->pwrctrl_flag))
 		on = ADRENO_PPD;
@@ -1962,6 +1968,12 @@ static void a5xx_pwrlevel_change_settings(struct adreno_device *adreno_dev,
 		test_bit(ADRENO_LM_CTRL, &adreno_dev->pwrctrl_flag))
 		on = ADRENO_LM;
 
+	/* On 540+ HW call through unconditionally as long as GPMU is enabled */
+	if (ADRENO_FEATURE(adreno_dev, ADRENO_GPMU)) {
+		if (adreno_is_a540(adreno_dev))
+			on = ADRENO_GPMU;
+	}
+
 	if (!on)
 		return;
 
diff --git a/drivers/gpu/msm/adreno_a5xx.h b/drivers/gpu/msm/adreno_a5xx.h
index 6c1b8d141671..e41b5b9cce0c 100644
--- a/drivers/gpu/msm/adreno_a5xx.h
+++ b/drivers/gpu/msm/adreno_a5xx.h
@@ -132,6 +132,9 @@ void a5xx_hwcg_set(struct adreno_device *adreno_dev, bool on);
 #define AMP_CALIBRATION_RETRY_CNT	3
 #define AMP_CALIBRATION_TIMEOUT		6
 
+/* A5XX_GPMU_GPMU_VOLTAGE_INTR_EN_MASK */
+#define VOLTAGE_INTR_EN			BIT(0)
+
 /* A5XX_GPMU_GPMU_PWR_THRESHOLD */
 #define PWR_THRESHOLD_VALID		0x80000000
 /* AGC */
@@ -170,7 +173,7 @@ void a5xx_hwcg_set(struct adreno_device *adreno_dev, bool on);
 #define AGC_LLM_ENABLED			(1 << 16)
 #define	AGC_GPU_VERSION_MASK		GENMASK(18, 17)
 #define AGC_GPU_VERSION_SHIFT		17
-#define AGC_BCL_ENABLED			(1 << 24)
+#define AGC_BCL_DISABLED		(1 << 24)
 
 
 #define AGC_LEVEL_CONFIG		(140/4)