diff options
| author | Asutosh Das <asutoshd@codeaurora.org> | 2013-06-13 14:27:42 +0530 |
|---|---|---|
| committer | Subhash Jadavani <subhashj@codeaurora.org> | 2016-05-27 10:28:48 -0700 |
| commit | 0c6d03791ca275d3d8f6c57bbee1a5a39e80d93b (patch) | |
| tree | 86f103a7ccd0d2192dd4f259b8b4ec5372532a68 /drivers | |
| parent | 6f092797e7859446617ecfe7668d0b40be932717 (diff) | |
mmc: sdhci-msm: ignore data-end-bit error in 1 bit mode
Some SDHC controllers are unable to handle data end-bit
errors in one bit mode.
This patch adds a quirk to ignore data-end-bit error in
1-bit mode in Qualcomm SDHC controllers.
Change-Id: Ica0f10573d654021449c32197b126e12bb1a3c10
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
[venkatg@codeaurora.org: sdhci_clear_set_irqs was removed
from 3.14 kernel, write the registers directly]
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed minor merge conflict and fixed
the bitmap for the quirk macro]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mmc/host/sdhci-msm.c | 2 | ||||
| -rw-r--r-- | drivers/mmc/host/sdhci.c | 6 | ||||
| -rw-r--r-- | drivers/mmc/host/sdhci.h | 5 |
3 files changed, 13 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index ef7fd50bb56e..f2fb9f56564a 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -2396,6 +2396,8 @@ static int sdhci_msm_probe(struct platform_device *pdev) host->quirks2 |= SDHCI_QUIRK2_RDWR_TX_ACTIVE_EOT; } + host->quirks2 |= SDHCI_QUIRK2_IGN_DATA_END_BIT_ERROR; + /* Setup PWRCTL irq */ pwr_irq = platform_get_irq_byname(pdev, "pwr_irq"); if (pwr_irq < 0) { diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index d6d241705397..c434771815dc 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -3695,6 +3695,12 @@ int sdhci_add_host(struct sdhci_host *host) mmc_add_host(mmc); + if (host->quirks2 & SDHCI_QUIRK2_IGN_DATA_END_BIT_ERROR) { + host->ier = (host->ier & ~SDHCI_INT_DATA_END_BIT); + sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); + sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); + } + pr_info("%s: SDHCI controller on %s [%s] using %s\n", mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)), (host->flags & SDHCI_USE_ADMA) ? diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 0820425efffc..9334741d2172 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -485,6 +485,11 @@ struct sdhci_host { */ #define SDHCI_QUIRK2_DIVIDE_TOUT_BY_4 (1 << 23) +/* + * Some SDHC controllers are unable to handle data-end bit error in + * 1-bit mode of SDIO. + */ +#define SDHCI_QUIRK2_IGN_DATA_END_BIT_ERROR (1<<24) int irq; /* Device IRQ */ void __iomem *ioaddr; /* Mapped address */ |