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authorSahitya Tummala <stummala@codeaurora.org>2013-06-07 13:03:07 +0530
committerSubhash Jadavani <subhashj@codeaurora.org>2016-05-27 10:28:41 -0700
commit5af7b3e981b3211eb80652aa1bcc224a43582888 (patch)
tree968525a2b631d889f064d03aa0090dbbaf1e98ee /drivers
parentb7fc1448ada0b061f94ccc341a54a44085e254c5 (diff)
mmc: sdhci-msm: set the clock rate before enabling it
The drivers must do clk_set_rate() before the first clk_prepare_enable() is invoked. Otherwise, the clock driver may give a warning for such clocks. CRs-fixed: 493685 Change-Id: I8342aa2f35d64a4dc7b8396bd9741c0aecaedc5c Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/host/sdhci-msm.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index d36221fb30fa..b76bc6b617c8 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -2151,16 +2151,16 @@ static int sdhci_msm_probe(struct platform_device *pdev)
goto pclk_disable;
}
- ret = clk_prepare_enable(msm_host->clk);
- if (ret)
- goto pclk_disable;
-
/* Set to the minimum supported clock frequency */
ret = clk_set_rate(msm_host->clk, sdhci_msm_get_min_clock(host));
if (ret) {
dev_err(&pdev->dev, "MClk rate set failed (%d)\n", ret);
- goto clk_disable;
+ goto pclk_disable;
}
+ ret = clk_prepare_enable(msm_host->clk);
+ if (ret)
+ goto pclk_disable;
+
msm_host->clk_rate = sdhci_msm_get_min_clock(host);
atomic_set(&msm_host->clks_on, 1);