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authorLinux Build Service Account <lnxbuild@localhost>2016-12-22 17:53:42 -0700
committerLinux Build Service Account <lnxbuild@localhost>2016-12-22 17:53:42 -0700
commit7aa1be414789d169eba3bce5345c4d009e989b6a (patch)
treecf4680b7a9e1c26e102207ff4a56427236a76721 /drivers
parent9982ad3f361c4789b78f8256d77f9506d4ead606 (diff)
parentba4fdd9852b5a61b6a22385a9e6cab9ea78346b9 (diff)
Promotion of kernel.lnx.4.4-161222.
CRs Change ID Subject -------------------------------------------------------------------------------------------------------------- 1103705 Id95a65cefc25174eaf2bcd9b3d97fd8d3e632adb iio: rradc: Update charger die temperature coefficients 1103814 If51734ae27add47a856ca378faf11e54b81e4dcf ARM: dts: msm: Enable context aware and quirks for A512 1104081 I2a17d95328bef91c4a5dd4dde418296efca44431 sched: Fix out of bounds array access in sched_reset_all 1102981 I69001073af6b72875f6d023a1eb754fe0a0e00a1 ARM: dts: msm: Enable camera for msmfalcon. 1059232 I92ace85ee7fd40c3f33f1b9f7bdd32469d990d84 USB: dwc3-msm: Add support for voting for PM_QOS_LATENCY 1103251 I604a94ed28cb8df389eea8815ba0b279c7b7603c ARM: dts: msm: Update Venus PIL clock voting for MSMFALC 1088153 I3499b2ee5bb1ddb74fc94fa55d3f5a8170d72b98 ARM: dts: msm: Modify BT node for QRD interposer msm8998 1097836 I175d76cd193d649f8b91cdab5000f6e1c66de15e cfg80211: Define macro to indicate support for update co 1085388 I2f083a399b0d433ac7e8fd358f75ec0778d0396a ARM: dts: msm: Disable clock gating on msmfalcon 1094763 Ib132eaa99e0632807124f44c8dd3bc90cf6710b0 ASoC: msm: Add routing controls for hfp, port mixer 1099759 Ib8fc3ed96e4704e71d9224a067fd8d9e88373cf0 drivers: mfd: clean up bootup info logs 1096945 I8fc3f646a0127ec705239be6a7de858a4f805acc wil6210: Block write ioctl to the card by default 1059232 I40a86a062910253401dc4a59f7ae84c518eebb5e ARM: dts: msm: Allow only wfi based on USB irq load for 1102504 Ia995e60b8d8d335239be0a35876d1becfd9a0f3c soc: qcom: glink_pkt: Remove BUG_ON in glink_pkt_write 1088153 Ibc1d54ca18c57a83c08e8a1eafc63e6aeb95f7c4 ARM: dts: msm: Enable blsp1_uart3_hs for QRD interposer 1086571 I70c5ec050f88e23c1d09fe0d19ac34a4a56977a1 ARM: dts: msm: Add battery profile for FG in qrd8998 int 1068294 I510c2fe7f763c8d44c67794c889c687df60398d7 regulator: gfx-ldo: support voltage based regulator oper 1100789 I84a936f834101ba2ad9e354c4d8df6d3c051a2f7 soc: qcom: glink_ssr: Add rx done for received packets 1094973 I98e443e894d81bcd815418f2a79723db14d87ce4 msm: ADSPRPC: Add channel for compute/modem DSP 1097863 Ib55302c8fc9dbf2a4114a793e17f9b2dc9ade37c nl80211: Use different attrs for BSSID and random MAC ad 1096083 I22bc2803d1cfa57777dda41c6d635b60f2740fad ARM: dts: msm: configure wled for mdss on falcon interpo 1097836 I184b8e13bc5f7e2ed21e5337673c6ba82cd2f4fe cfg80211: Add support to update connection parameters Change-Id: I9b9d04bbef27f5576bd29dde1fe8f9bbcd9c419f CRs-Fixed: 1094763, 1100789, 1103814, 1103705, 1097863, 1096083, 1094973, 1097836, 1085388, 1099759, 1059232, 1096945, 1103251, 1102504, 1068294, 1088153, 1104081, 1086571, 1102981
Diffstat (limited to 'drivers')
-rw-r--r--drivers/char/adsprpc.c15
-rw-r--r--drivers/iio/adc/qcom-rradc.c8
-rw-r--r--drivers/mfd/wcd9xxx-utils.c2
-rw-r--r--drivers/net/wireless/ath/wil6210/Kconfig11
-rw-r--r--drivers/net/wireless/ath/wil6210/ioctl.c4
-rw-r--r--drivers/regulator/msm_gfx_ldo.c405
-rw-r--r--drivers/soc/qcom/glink_ssr.c33
-rw-r--r--drivers/soc/qcom/msm_glink_pkt.c19
-rw-r--r--drivers/usb/dwc3/dwc3-msm.c92
9 files changed, 485 insertions, 104 deletions
diff --git a/drivers/char/adsprpc.c b/drivers/char/adsprpc.c
index 7767086df849..c056ad9625b1 100644
--- a/drivers/char/adsprpc.c
+++ b/drivers/char/adsprpc.c
@@ -58,7 +58,7 @@
#define RPC_TIMEOUT (5 * HZ)
#define BALIGN 128
-#define NUM_CHANNELS 3 /*1 adsp, 1 mdsp*/
+#define NUM_CHANNELS 4 /* adsp,sdsp,mdsp,cdsp */
#define NUM_SESSIONS 9 /*8 compute, 1 cpz*/
#define IS_CACHE_ALIGNED(x) (((x) & ((L1_CACHE_BYTES)-1)) == 0)
@@ -264,6 +264,13 @@ static struct fastrpc_channel_ctx gcinfo[NUM_CHANNELS] = {
.link.link_info.transport = "smem",
},
{
+ .name = "mdsprpc-smd",
+ .subsys = "modem",
+ .channel = SMD_APPS_MODEM,
+ .link.link_info.edge = "mpss",
+ .link.link_info.transport = "smem",
+ },
+ {
.name = "sdsprpc-smd",
.subsys = "dsps",
.channel = SMD_APPS_DSPS,
@@ -271,6 +278,12 @@ static struct fastrpc_channel_ctx gcinfo[NUM_CHANNELS] = {
.link.link_info.transport = "smem",
.vmid = VMID_SSC_Q6,
},
+ {
+ .name = "cdsprpc-smd",
+ .subsys = "cdsp",
+ .link.link_info.edge = "cdsp",
+ .link.link_info.transport = "smem",
+ },
};
static void fastrpc_buf_free(struct fastrpc_buf *buf, int cache)
diff --git a/drivers/iio/adc/qcom-rradc.c b/drivers/iio/adc/qcom-rradc.c
index ec774917f4a4..b7504fdd380f 100644
--- a/drivers/iio/adc/qcom-rradc.c
+++ b/drivers/iio/adc/qcom-rradc.c
@@ -165,10 +165,10 @@
#define FAB_ID_GF 0x30
#define FAB_ID_SMIC 0x11
-#define FG_ADC_RR_CHG_TEMP_GF_OFFSET_UV 1296794
-#define FG_ADC_RR_CHG_TEMP_GF_SLOPE_UV_PER_C 3858
-#define FG_ADC_RR_CHG_TEMP_SMIC_OFFSET_UV 1339518
-#define FG_ADC_RR_CHG_TEMP_SMIC_SLOPE_UV_PER_C 3598
+#define FG_ADC_RR_CHG_TEMP_GF_OFFSET_UV 1303168
+#define FG_ADC_RR_CHG_TEMP_GF_SLOPE_UV_PER_C 3784
+#define FG_ADC_RR_CHG_TEMP_SMIC_OFFSET_UV 1338433
+#define FG_ADC_RR_CHG_TEMP_SMIC_SLOPE_UV_PER_C 3655
#define FG_ADC_RR_CHG_TEMP_OFFSET_MILLI_DEGC 25000
#define FG_ADC_RR_CHG_THRESHOLD_SCALE 4
diff --git a/drivers/mfd/wcd9xxx-utils.c b/drivers/mfd/wcd9xxx-utils.c
index 2b0a5f8ce7f2..909e2f77a43e 100644
--- a/drivers/mfd/wcd9xxx-utils.c
+++ b/drivers/mfd/wcd9xxx-utils.c
@@ -287,7 +287,7 @@ static u32 wcd9xxx_validate_dmic_sample_rate(struct device *dev,
return dmic_sample_rate;
undefined_rate:
- dev_info(dev, "%s: Invalid %s = %d, for mclk %d\n",
+ dev_dbg(dev, "%s: Invalid %s = %d, for mclk %d\n",
__func__, dmic_rate_type, dmic_sample_rate, mclk_rate);
dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
diff --git a/drivers/net/wireless/ath/wil6210/Kconfig b/drivers/net/wireless/ath/wil6210/Kconfig
index 9e3961c400ac..8f0bde5825d5 100644
--- a/drivers/net/wireless/ath/wil6210/Kconfig
+++ b/drivers/net/wireless/ath/wil6210/Kconfig
@@ -41,6 +41,17 @@ config WIL6210_TRACING
If unsure, say Y to make it easier to debug problems.
+config WIL6210_WRITE_IOCTL
+ bool "wil6210 write ioctl to the device"
+ depends on WIL6210
+ default n
+ ---help---
+ Say Y here to allow write-access from user-space to
+ the device memory through ioctl. This is useful for
+ debugging purposes only.
+
+ If unsure, say N.
+
config WIL6210_PLATFORM_MSM
bool "wil6210 MSM platform specific support"
depends on WIL6210
diff --git a/drivers/net/wireless/ath/wil6210/ioctl.c b/drivers/net/wireless/ath/wil6210/ioctl.c
index 47058ccccb5b..bbdd232df3b7 100644
--- a/drivers/net/wireless/ath/wil6210/ioctl.c
+++ b/drivers/net/wireless/ath/wil6210/ioctl.c
@@ -87,10 +87,12 @@ static int wil_ioc_memio_dword(struct wil6210_priv *wil, void __user *data)
io.val = readl(a);
need_copy = true;
break;
+#if defined(CONFIG_WIL6210_WRITE_IOCTL)
case wil_mmio_write:
writel(io.val, a);
wmb(); /* make sure write propagated to HW */
break;
+#endif
default:
wil_err(wil, "Unsupported operation, op = 0x%08x\n", io.op);
return -EINVAL;
@@ -147,6 +149,7 @@ static int wil_ioc_memio_block(struct wil6210_priv *wil, void __user *data)
goto out_free;
}
break;
+#if defined(CONFIG_WIL6210_WRITE_IOCTL)
case wil_mmio_write:
if (copy_from_user(block, io.block, io.size)) {
rc = -EFAULT;
@@ -156,6 +159,7 @@ static int wil_ioc_memio_block(struct wil6210_priv *wil, void __user *data)
wmb(); /* make sure write propagated to HW */
wil_hex_dump_ioctl("Write ", block, io.size);
break;
+#endif
default:
wil_err(wil, "Unsupported operation, op = 0x%08x\n", io.op);
rc = -EINVAL;
diff --git a/drivers/regulator/msm_gfx_ldo.c b/drivers/regulator/msm_gfx_ldo.c
index 3c0cc9a74cd7..d2f743b8089a 100644
--- a/drivers/regulator/msm_gfx_ldo.c
+++ b/drivers/regulator/msm_gfx_ldo.c
@@ -27,11 +27,13 @@
#include <linux/regulator/of_regulator.h>
#include <linux/slab.h>
#include <linux/uaccess.h>
+#include <linux/regulator/msm-ldo-regulator.h>
#define LDO_ATEST_REG 0x0
#define LDO_CFG0_REG 0x4
#define LDO_CFG1_REG 0x8
#define LDO_CFG2_REG 0xC
+#define LDO_LD_DATA_REG 0x10
#define LDO_VREF_TEST_CFG 0x14
#define ENABLE_LDO_STATUS_BIT (BIT(8) | BIT(12))
@@ -46,6 +48,7 @@
#define LDO_CLAMP_IO_BIT BIT(31)
#define CPR_BYPASS_IN_LDO_MODE_BIT BIT(30)
#define EN_LDOAP_CTRL_CPR_BIT BIT(29)
+#define CX_CPR_BYPASS_IN_LDO_MODE_BIT BIT(10)
#define PWR_SRC_SEL_BIT BIT(9)
#define ACK_SW_OVR_BIT BIT(8)
#define LDO_PREON_SW_OVR_BIT BIT(7)
@@ -63,6 +66,10 @@
#define LDO_READY_BIT BIT(2)
#define BHS_EN_REST_ACK_BIT BIT(1)
+#define REF_CURRENT_X1_REG 0x2C
+#define REF_CURRENT_X2_REG 0x30
+#define ADC_CTL_REG 0x34
+
#define MIN_LDO_VOLTAGE 375000
#define MAX_LDO_VOLTAGE 980000
#define LDO_STEP_VOLATGE 5000
@@ -76,17 +83,17 @@
#define GFX_LDO_FUSE_STEP_VOLT 10000
#define GFX_LDO_FUSE_SIZE 5
-enum regulator_mode {
- LDO,
- BHS,
-};
-
enum direction {
NO_CHANGE,
UP,
DOWN,
};
+enum voltage_handling {
+ VOLTAGE,
+ CORNER,
+};
+
struct fuse_param {
unsigned row;
unsigned bit_start;
@@ -127,10 +134,11 @@ struct msm_gfx_ldo {
phys_addr_t ldo_addr;
bool vreg_enabled;
- enum regulator_mode mode;
+ enum msm_ldo_supply_mode mode;
u32 corner;
int ldo_voltage_uv;
struct mutex ldo_mutex;
+ enum voltage_handling ops_type;
};
#define MSM8953_LDO_FUSE_CORNERS 3
@@ -144,6 +152,19 @@ static struct ldo_config msm8953_ldo_config[] = {
{LDO_MAX_OFFSET, LDO_MAX_OFFSET},
};
+static struct ldo_config msmfalcon_ldo_config[] = {
+ {LDO_ATEST_REG, 0x00000080},
+ {LDO_CFG0_REG, 0x0100A600},
+ {LDO_CFG1_REG, 0x000000A0},
+ {LDO_CFG2_REG, 0x0000C3FE},
+ {LDO_LD_DATA_REG, 0x00000000},
+ {LDO_VREF_TEST_CFG, 0x00401100},
+ {REF_CURRENT_X1_REG, 0x00000230},
+ {REF_CURRENT_X2_REG, 0x00000048},
+ {ADC_CTL_REG, 0x00000000},
+ {LDO_MAX_OFFSET, LDO_MAX_OFFSET},
+};
+
static struct fuse_param msm8953_ldo_enable_param[] = {
{65, 11, 11},
{},
@@ -162,6 +183,11 @@ static const int msm8953_fuse_ref_volt[MSM8953_LDO_FUSE_CORNERS] = {
720000,
};
+enum {
+ MSM8953_SOC_ID,
+ MSMFALCON_SOC_ID,
+};
+
static int convert_open_loop_voltage_fuse(int ref_volt, int step_volt,
u32 fuse, int fuse_len)
{
@@ -209,14 +235,14 @@ static int read_fuse_param(void __iomem *fuse_base_addr,
return 0;
}
-static enum regulator_mode get_operating_mode(struct msm_gfx_ldo *ldo_vreg,
+static enum msm_ldo_supply_mode get_operating_mode(struct msm_gfx_ldo *ldo_vreg,
int corner)
{
if (!ldo_vreg->ldo_mode_disable && ldo_vreg->ldo_fuse_enable
&& ldo_vreg->ldo_corner_en_map[corner])
- return LDO;
+ return LDO_MODE;
- return BHS;
+ return BHS_MODE;
}
static char *register_str[] = {
@@ -247,14 +273,12 @@ static void dump_registers(struct msm_gfx_ldo *ldo_vreg, char *func)
#define GET_VREF(a) DIV_ROUND_UP(a - MIN_LDO_VOLTAGE, LDO_STEP_VOLATGE)
-static void configure_ldo_voltage(struct msm_gfx_ldo *ldo_vreg, int new_corner)
+static void configure_ldo_voltage(struct msm_gfx_ldo *ldo_vreg, int new_uv)
{
- int new_uv = 0, val = 0;
+ int val = 0;
u32 reg = 0;
- new_uv = ldo_vreg->open_loop_volt[new_corner];
val = GET_VREF(new_uv);
-
reg = readl_relaxed(ldo_vreg->ldo_base + LDO_VREF_SET_REG);
/* set the new voltage */
@@ -266,6 +290,9 @@ static void configure_ldo_voltage(struct msm_gfx_ldo *ldo_vreg, int new_corner)
reg |= UPDATE_VREF_BIT;
writel_relaxed(reg, ldo_vreg->ldo_base + LDO_VREF_SET_REG);
+ /* complete the writes */
+ mb();
+
reg &= ~UPDATE_VREF_BIT;
writel_relaxed(reg, ldo_vreg->ldo_base + LDO_VREF_SET_REG);
@@ -275,12 +302,12 @@ static void configure_ldo_voltage(struct msm_gfx_ldo *ldo_vreg, int new_corner)
mb();
}
-static int ldo_update_voltage(struct msm_gfx_ldo *ldo_vreg, int new_corner)
+static int ldo_update_voltage(struct msm_gfx_ldo *ldo_vreg, int new_uv)
{
int timeout = 50;
u32 reg = 0;
- configure_ldo_voltage(ldo_vreg, new_corner);
+ configure_ldo_voltage(ldo_vreg, new_uv);
while (--timeout) {
reg = readl_relaxed(ldo_vreg->ldo_base +
@@ -303,16 +330,12 @@ static int ldo_update_voltage(struct msm_gfx_ldo *ldo_vreg, int new_corner)
return 0;
}
-static int enable_ldo_mode(struct msm_gfx_ldo *ldo_vreg)
+static int enable_ldo_mode(struct msm_gfx_ldo *ldo_vreg, int new_uv)
{
u32 ctl = 0;
/* set the ldo-vref */
- configure_ldo_voltage(ldo_vreg, ldo_vreg->corner);
-
- pr_debug("LDO voltage configured =%d uV corner=%d\n",
- ldo_vreg->ldo_voltage_uv,
- ldo_vreg->corner + MIN_CORNER_OFFSET);
+ configure_ldo_voltage(ldo_vreg, new_uv);
/* configure the LDO for power-up */
ctl = readl_relaxed(ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG);
@@ -342,8 +365,10 @@ static int enable_ldo_mode(struct msm_gfx_ldo *ldo_vreg)
writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG);
/* put CPR in bypass mode */
- ctl |= CPR_BYPASS_IN_LDO_MODE_BIT;
- writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG);
+ if (ldo_vreg->ops_type == CORNER) {
+ ctl |= CPR_BYPASS_IN_LDO_MODE_BIT;
+ writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG);
+ }
/* complete all writes */
mb();
@@ -367,9 +392,11 @@ static int enable_bhs_mode(struct msm_gfx_ldo *ldo_vreg)
ctl &= ~PWR_SRC_SEL_BIT;
writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG);
- /* clear CPR in by-pass mode */
- ctl &= ~CPR_BYPASS_IN_LDO_MODE_BIT;
- writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG);
+ if (ldo_vreg->ops_type == CORNER) {
+ /* clear GFX CPR in by-pass mode */
+ ctl &= ~CPR_BYPASS_IN_LDO_MODE_BIT;
+ writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG);
+ }
/* Enable the BHS control signals to gdsc */
ctl &= ~BHS_EN_FEW_BIT;
@@ -386,11 +413,11 @@ static int enable_bhs_mode(struct msm_gfx_ldo *ldo_vreg)
return 0;
}
-static int msm_gfx_ldo_enable(struct regulator_dev *rdev)
+static int msm_gfx_ldo_corner_enable(struct regulator_dev *rdev)
{
struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev);
- int rc = 0;
- enum regulator_mode enable_mode;
+ int rc = 0, new_uv;
+ enum msm_ldo_supply_mode enable_mode;
mutex_lock(&ldo_vreg->ldo_mutex);
@@ -415,19 +442,24 @@ static int msm_gfx_ldo_enable(struct regulator_dev *rdev)
}
enable_mode = get_operating_mode(ldo_vreg, ldo_vreg->corner);
- if (enable_mode == LDO)
- rc = enable_ldo_mode(ldo_vreg);
- else
+ if (enable_mode == LDO_MODE) {
+ new_uv = ldo_vreg->open_loop_volt[ldo_vreg->corner];
+ rc = enable_ldo_mode(ldo_vreg, new_uv);
+ pr_debug("LDO voltage configured =%d uV corner=%d\n",
+ ldo_vreg->ldo_voltage_uv,
+ ldo_vreg->corner + MIN_CORNER_OFFSET);
+ } else {
rc = enable_bhs_mode(ldo_vreg);
+ }
if (rc) {
pr_err("Failed to enable regulator in %s mode rc=%d\n",
- (enable_mode == LDO) ? "LDO" : "BHS", rc);
+ (enable_mode == LDO_MODE) ? "LDO" : "BHS", rc);
goto disable_cx;
}
pr_debug("regulator_enable complete. mode=%s, corner=%d\n",
- (enable_mode == LDO) ? "LDO" : "BHS",
+ (enable_mode == LDO_MODE) ? "LDO" : "BHS",
ldo_vreg->corner + MIN_CORNER_OFFSET);
ldo_vreg->mode = enable_mode;
@@ -471,15 +503,17 @@ done:
return rc;
}
-static int switch_mode_to_ldo(struct msm_gfx_ldo *ldo_vreg, int new_corner)
+static int switch_mode_to_ldo(struct msm_gfx_ldo *ldo_vreg, int new_uv)
{
u32 ctl = 0, status = 0, timeout = 50;
ctl = readl_relaxed(ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG);
- /* enable CPR bypass mode for LDO */
- ctl |= CPR_BYPASS_IN_LDO_MODE_BIT;
- writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG);
+ if (ldo_vreg->ops_type == CORNER) {
+ /* enable CPR bypass mode for LDO */
+ ctl |= CPR_BYPASS_IN_LDO_MODE_BIT;
+ writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG);
+ }
/* fake ack to GDSC */
ctl |= ACK_SW_OVR_BIT;
@@ -512,7 +546,7 @@ static int switch_mode_to_ldo(struct msm_gfx_ldo *ldo_vreg, int new_corner)
writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG);
/* set the new LDO voltage */
- ldo_update_voltage(ldo_vreg, new_corner);
+ ldo_update_voltage(ldo_vreg, new_uv);
pr_debug("LDO voltage =%d uV\n", ldo_vreg->ldo_voltage_uv);
@@ -616,9 +650,11 @@ static int switch_mode_to_bhs(struct msm_gfx_ldo *ldo_vreg)
ctl &= ~BHS_UNDER_SW_CTL;
writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG);
- /* Enable CPR in BHS mode */
- ctl &= ~CPR_BYPASS_IN_LDO_MODE_BIT;
- writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG);
+ if (ldo_vreg->ops_type == CORNER) {
+ /* Enable CPR in BHS mode */
+ ctl &= ~CPR_BYPASS_IN_LDO_MODE_BIT;
+ writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG);
+ }
/* make sure that all configuration is complete */
mb();
@@ -628,12 +664,12 @@ static int switch_mode_to_bhs(struct msm_gfx_ldo *ldo_vreg)
return 0;
}
-static int msm_gfx_ldo_set_voltage(struct regulator_dev *rdev,
+static int msm_gfx_ldo_set_corner(struct regulator_dev *rdev,
int corner, int corner_max, unsigned *selector)
{
struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev);
- int rc = 0, mem_acc_corner;
- enum regulator_mode new_mode;
+ int rc = 0, mem_acc_corner, new_uv;
+ enum msm_ldo_supply_mode new_mode;
enum direction dir = NO_CHANGE;
corner -= MIN_CORNER_OFFSET;
@@ -645,7 +681,7 @@ static int msm_gfx_ldo_set_voltage(struct regulator_dev *rdev,
goto done;
pr_debug("set-voltage requested: old_mode=%s old_corner=%d new_corner=%d vreg_enabled=%d\n",
- ldo_vreg->mode == BHS ? "BHS" : "LDO",
+ ldo_vreg->mode == BHS_MODE ? "BHS" : "LDO",
ldo_vreg->corner + MIN_CORNER_OFFSET,
corner + MIN_CORNER_OFFSET,
ldo_vreg->vreg_enabled);
@@ -679,21 +715,23 @@ static int msm_gfx_ldo_set_voltage(struct regulator_dev *rdev,
new_mode = get_operating_mode(ldo_vreg, corner);
- if (new_mode == BHS) {
- if (ldo_vreg->mode == LDO) {
+ if (new_mode == BHS_MODE) {
+ if (ldo_vreg->mode == LDO_MODE) {
rc = switch_mode_to_bhs(ldo_vreg);
if (rc)
pr_err("Switch to BHS corner=%d failed rc=%d\n",
corner + MIN_CORNER_OFFSET, rc);
}
} else { /* new mode - LDO */
- if (ldo_vreg->mode == BHS) {
- rc = switch_mode_to_ldo(ldo_vreg, corner);
+ new_uv = ldo_vreg->open_loop_volt[ldo_vreg->corner];
+
+ if (ldo_vreg->mode == BHS_MODE) {
+ rc = switch_mode_to_ldo(ldo_vreg, new_uv);
if (rc)
pr_err("Switch to LDO failed corner=%d rc=%d\n",
corner + MIN_CORNER_OFFSET, rc);
} else {
- rc = ldo_update_voltage(ldo_vreg, corner);
+ rc = ldo_update_voltage(ldo_vreg, new_uv);
if (rc)
pr_err("Update voltage failed corner=%d rc=%d\n",
corner + MIN_CORNER_OFFSET, rc);
@@ -702,8 +740,8 @@ static int msm_gfx_ldo_set_voltage(struct regulator_dev *rdev,
if (!rc) {
pr_debug("set-voltage complete. old_mode=%s new_mode=%s old_corner=%d new_corner=%d\n",
- ldo_vreg->mode == BHS ? "BHS" : "LDO",
- new_mode == BHS ? "BHS" : "LDO",
+ ldo_vreg->mode == BHS_MODE ? "BHS" : "LDO",
+ new_mode == BHS_MODE ? "BHS" : "LDO",
ldo_vreg->corner + MIN_CORNER_OFFSET,
corner + MIN_CORNER_OFFSET);
@@ -721,7 +759,7 @@ done:
return rc;
}
-static int msm_gfx_ldo_get_voltage(struct regulator_dev *rdev)
+static int msm_gfx_ldo_get_corner(struct regulator_dev *rdev)
{
struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev);
@@ -736,11 +774,132 @@ static int msm_gfx_ldo_is_enabled(struct regulator_dev *rdev)
}
static struct regulator_ops msm_gfx_ldo_corner_ops = {
- .enable = msm_gfx_ldo_enable,
+ .enable = msm_gfx_ldo_corner_enable,
+ .disable = msm_gfx_ldo_disable,
+ .is_enabled = msm_gfx_ldo_is_enabled,
+ .set_voltage = msm_gfx_ldo_set_corner,
+ .get_voltage = msm_gfx_ldo_get_corner,
+};
+
+static int msm_gfx_ldo_get_bypass(struct regulator_dev *rdev,
+ bool *enable)
+{
+ struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev);
+
+ *enable = ldo_vreg->mode;
+
+ return 0;
+}
+
+static int msm_gfx_ldo_set_bypass(struct regulator_dev *rdev,
+ bool mode)
+{
+ struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev);
+ int rc = 0;
+
+ mutex_lock(&ldo_vreg->ldo_mutex);
+
+ if (ldo_vreg->mode == mode || !ldo_vreg->vreg_enabled)
+ goto done;
+
+ if (mode == LDO_MODE)
+ rc = switch_mode_to_ldo(ldo_vreg, ldo_vreg->ldo_voltage_uv);
+ else
+ rc = switch_mode_to_bhs(ldo_vreg);
+
+ if (rc) {
+ pr_err("Failed to configure regulator in %s mode rc=%d\n",
+ (mode == LDO_MODE) ? "LDO" : "BHS", rc);
+ goto done;
+ }
+
+ pr_debug("regulator_set_bypass complete. mode=%s, voltage = %d uV\n",
+ (mode == LDO_MODE) ? "LDO" : "BHS",
+ (mode == LDO_MODE) ? ldo_vreg->ldo_voltage_uv : 0);
+
+ ldo_vreg->mode = mode;
+
+done:
+ mutex_unlock(&ldo_vreg->ldo_mutex);
+ return rc;
+}
+
+static int msm_gfx_ldo_voltage_enable(struct regulator_dev *rdev)
+{
+ struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev);
+ int rc = 0;
+ enum msm_ldo_supply_mode enable_mode;
+
+ mutex_lock(&ldo_vreg->ldo_mutex);
+
+ pr_debug("regulator_enable requested. voltage=%d\n",
+ ldo_vreg->ldo_voltage_uv);
+
+ enable_mode = ldo_vreg->mode;
+
+ if (enable_mode == LDO_MODE)
+ rc = enable_ldo_mode(ldo_vreg, ldo_vreg->ldo_voltage_uv);
+ else
+ rc = enable_bhs_mode(ldo_vreg);
+
+ if (rc) {
+ pr_err("Failed to enable regulator in %s mode rc=%d\n",
+ (enable_mode == LDO_MODE) ? "LDO" : "BHS", rc);
+ goto fail;
+ }
+
+ pr_debug("regulator_enable complete. mode=%s, voltage = %d uV\n",
+ (enable_mode == LDO_MODE) ? "LDO" : "BHS",
+ (enable_mode == LDO_MODE) ? ldo_vreg->ldo_voltage_uv : 0);
+
+ ldo_vreg->vreg_enabled = true;
+
+fail:
+ mutex_unlock(&ldo_vreg->ldo_mutex);
+ return rc;
+}
+
+static int msm_gfx_ldo_set_voltage(struct regulator_dev *rdev,
+ int new_uv, int max_uv, unsigned *selector)
+{
+ struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev);
+ int rc = 0;
+
+ mutex_lock(&ldo_vreg->ldo_mutex);
+
+ if (new_uv == ldo_vreg->ldo_voltage_uv)
+ goto done;
+
+ if (!ldo_vreg->vreg_enabled || ldo_vreg->mode != LDO_MODE) {
+ ldo_vreg->ldo_voltage_uv = new_uv;
+ goto done;
+ }
+
+ /* update LDO voltage */
+ rc = ldo_update_voltage(ldo_vreg, new_uv);
+ if (rc)
+ pr_err("Update voltage failed for [%d, %d], rc=%d\n",
+ new_uv, max_uv, rc);
+done:
+ mutex_unlock(&ldo_vreg->ldo_mutex);
+ return rc;
+}
+
+static int msm_gfx_ldo_get_voltage(struct regulator_dev *rdev)
+{
+ struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev);
+
+ return ldo_vreg->ldo_voltage_uv;
+}
+
+static struct regulator_ops msm_gfx_ldo_voltage_ops = {
+ .enable = msm_gfx_ldo_voltage_enable,
.disable = msm_gfx_ldo_disable,
.is_enabled = msm_gfx_ldo_is_enabled,
.set_voltage = msm_gfx_ldo_set_voltage,
.get_voltage = msm_gfx_ldo_get_voltage,
+ .set_bypass = msm_gfx_ldo_set_bypass,
+ .get_bypass = msm_gfx_ldo_get_bypass,
};
static int msm_gfx_ldo_adjust_init_voltage(struct msm_gfx_ldo *ldo_vreg)
@@ -764,6 +923,9 @@ static int msm_gfx_ldo_adjust_init_voltage(struct msm_gfx_ldo *ldo_vreg)
volt_adjust = devm_kcalloc(ldo_vreg->dev, size, sizeof(*volt_adjust),
GFP_KERNEL);
+ if (!volt_adjust)
+ return -ENOMEM;
+
rc = of_property_read_u32_array(of_node, prop_name, volt_adjust, size);
if (rc) {
pr_err("failed to read %s property rc=%d\n", prop_name, rc);
@@ -950,7 +1112,7 @@ static int msm_gfx_ldo_init(struct platform_device *pdev,
{
struct resource *res;
u32 len, ctl;
- int rc, i = 0;
+ int i = 0;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ldo_addr");
if (!res || !res->start) {
@@ -969,12 +1131,6 @@ static int msm_gfx_ldo_init(struct platform_device *pdev,
return -EINVAL;
}
- rc = msm_gfx_ldo_mem_acc_init(ldo_vreg);
- if (rc) {
- pr_err("Unable to initialize mem_acc rc=%d\n", rc);
- return rc;
- }
-
/* HW initialization */
/* clear clamp_io, enable CPR in auto-bypass*/
@@ -1117,7 +1273,6 @@ static int msm_gfx_ldo_target_init(struct msm_gfx_ldo *ldo_vreg)
ldo_vreg->init_volt_param[i] =
msm8953_init_voltage_param[i];
- ldo_vreg->ldo_init_config = msm8953_ldo_config;
ldo_vreg->ref_volt = msm8953_fuse_ref_volt;
ldo_vreg->ldo_enable_param = msm8953_ldo_enable_param;
@@ -1156,7 +1311,7 @@ static int debugfs_ldo_set_voltage(void *data, u64 val)
mutex_lock(&ldo_vreg->ldo_mutex);
- if (ldo_vreg->mode == BHS || !ldo_vreg->vreg_enabled ||
+ if (ldo_vreg->mode == BHS_MODE || !ldo_vreg->vreg_enabled ||
val > MAX_LDO_VOLTAGE || val < MIN_LDO_VOLTAGE) {
rc = -EINVAL;
goto done;
@@ -1174,6 +1329,9 @@ static int debugfs_ldo_set_voltage(void *data, u64 val)
reg |= UPDATE_VREF_BIT;
writel_relaxed(reg, ldo_vreg->ldo_base + LDO_VREF_SET_REG);
+ /* complete the writes */
+ mb();
+
reg &= ~UPDATE_VREF_BIT;
writel_relaxed(reg, ldo_vreg->ldo_base + LDO_VREF_SET_REG);
@@ -1210,7 +1368,7 @@ static int debugfs_ldo_get_voltage(void *data, u64 *val)
mutex_lock(&ldo_vreg->ldo_mutex);
- if (ldo_vreg->mode == BHS || !ldo_vreg->vreg_enabled) {
+ if (ldo_vreg->mode == BHS_MODE || !ldo_vreg->vreg_enabled) {
rc = -EINVAL;
goto done;
}
@@ -1250,7 +1408,7 @@ static ssize_t msm_gfx_ldo_debug_info_read(struct file *file, char __user *buff,
len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
"Regulator_enable = %d Regulator mode = %s Corner = %d LDO-voltage = %d uV\n",
ldo_vreg->vreg_enabled,
- ldo_vreg->mode == BHS ? "BHS" : "LDO",
+ ldo_vreg->mode == BHS_MODE ? "BHS" : "LDO",
ldo_vreg->corner + MIN_CORNER_OFFSET,
ldo_vreg->ldo_voltage_uv);
ret += len;
@@ -1313,6 +1471,57 @@ static void msm_gfx_ldo_debugfs_remove(struct msm_gfx_ldo *ldo_vreg)
debugfs_remove_recursive(ldo_vreg->debugfs);
}
+static int msm_gfx_ldo_corner_config_init(struct msm_gfx_ldo *ldo_vreg,
+ struct platform_device *pdev)
+{
+ int rc;
+
+ rc = msm_gfx_ldo_target_init(ldo_vreg);
+ if (rc) {
+ pr_err("Unable to initialize target specific data rc=%d", rc);
+ return rc;
+ }
+
+ rc = msm_gfx_ldo_parse_dt(ldo_vreg);
+ if (rc) {
+ pr_err("Unable to pasrse dt rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = msm_gfx_ldo_efuse_init(pdev, ldo_vreg);
+ if (rc) {
+ pr_err("efuse_init failed rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = msm_gfx_ldo_voltage_init(ldo_vreg);
+ if (rc) {
+ pr_err("ldo_voltage_init failed rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = msm_gfx_ldo_mem_acc_init(ldo_vreg);
+ if (rc) {
+ pr_err("Unable to initialize mem_acc rc=%d\n", rc);
+ return rc;
+ }
+
+ return rc;
+};
+
+/* Data corresponds to the SoC revision */
+static const struct of_device_id msm_gfx_ldo_match_table[] = {
+ {
+ .compatible = "qcom,msm8953-gfx-ldo",
+ .data = (void *)(uintptr_t)MSM8953_SOC_ID,
+ },
+ {
+ .compatible = "qcom,msmfalcon-gfx-ldo",
+ .data = (void *)(uintptr_t)MSMFALCON_SOC_ID,
+ },
+ {}
+};
+
static int msm_gfx_ldo_probe(struct platform_device *pdev)
{
struct msm_gfx_ldo *ldo_vreg;
@@ -1320,13 +1529,18 @@ static int msm_gfx_ldo_probe(struct platform_device *pdev)
struct regulator_desc *rdesc;
struct regulator_init_data *init_data = pdev->dev.platform_data;
struct device *dev = &pdev->dev;
- int rc;
+ const struct of_device_id *match;
+ int soc_id, rc;
+
+ match = of_match_device(msm_gfx_ldo_match_table, dev);
+ if (!match)
+ return -ENODEV;
ldo_vreg = devm_kzalloc(dev, sizeof(*ldo_vreg), GFP_KERNEL);
if (!ldo_vreg)
return -ENOMEM;
- init_data = of_get_regulator_init_data(dev, dev->of_node);
+ init_data = of_get_regulator_init_data(dev, dev->of_node, NULL);
if (!init_data) {
pr_err("regulator init data is missing\n");
return -EINVAL;
@@ -1342,34 +1556,34 @@ static int msm_gfx_ldo_probe(struct platform_device *pdev)
return -EINVAL;
}
+ soc_id = (uintptr_t)match->data;
ldo_vreg->dev = &pdev->dev;
mutex_init(&ldo_vreg->ldo_mutex);
platform_set_drvdata(pdev, ldo_vreg);
- rc = msm_gfx_ldo_target_init(ldo_vreg);
- if (rc) {
- pr_err("Unable to initialize target specific data rc=%d", rc);
- return rc;
- }
-
- rc = msm_gfx_ldo_parse_dt(ldo_vreg);
- if (rc) {
- pr_err("Unable to pasrse dt rc=%d\n", rc);
- return rc;
- }
-
- rc = msm_gfx_ldo_efuse_init(pdev, ldo_vreg);
- if (rc) {
- pr_err("efuse_init failed rc=%d\n", rc);
- return rc;
- }
-
- rc = msm_gfx_ldo_voltage_init(ldo_vreg);
- if (rc) {
- pr_err("ldo_voltage_init failed rc=%d\n", rc);
- return rc;
+ switch (soc_id) {
+ case MSM8953_SOC_ID:
+ ldo_vreg->ldo_init_config = msm8953_ldo_config;
+ ldo_vreg->ops_type = CORNER;
+ rc = msm_gfx_ldo_corner_config_init(ldo_vreg, pdev);
+ if (rc) {
+ pr_err("ldo corner handling initialization failed, rc=%d\n",
+ rc);
+ return rc;
+ }
+ break;
+ case MSMFALCON_SOC_ID:
+ ldo_vreg->ldo_init_config = msmfalcon_ldo_config;
+ ldo_vreg->ops_type = VOLTAGE;
+ init_data->constraints.valid_ops_mask
+ |= REGULATOR_CHANGE_BYPASS;
+ break;
+ default:
+ pr_err("invalid SOC ID = %d\n", soc_id);
+ return -EINVAL;
}
+ /* HW initialization */
rc = msm_gfx_ldo_init(pdev, ldo_vreg);
if (rc) {
pr_err("ldo_init failed rc=%d\n", rc);
@@ -1379,7 +1593,11 @@ static int msm_gfx_ldo_probe(struct platform_device *pdev)
rdesc = &ldo_vreg->rdesc;
rdesc->owner = THIS_MODULE;
rdesc->type = REGULATOR_VOLTAGE;
- rdesc->ops = &msm_gfx_ldo_corner_ops;
+
+ if (ldo_vreg->ops_type == CORNER)
+ rdesc->ops = &msm_gfx_ldo_corner_ops;
+ else
+ rdesc->ops = &msm_gfx_ldo_voltage_ops;
reg_config.dev = &pdev->dev;
reg_config.init_data = init_data;
@@ -1408,11 +1626,6 @@ static int msm_gfx_ldo_remove(struct platform_device *pdev)
return 0;
}
-static struct of_device_id msm_gfx_ldo_match_table[] = {
- { .compatible = "qcom,msm8953-gfx-ldo", },
- {}
-};
-
static struct platform_driver msm_gfx_ldo_driver = {
.driver = {
.name = "qcom,msm-gfx-ldo",
diff --git a/drivers/soc/qcom/glink_ssr.c b/drivers/soc/qcom/glink_ssr.c
index a14d912b7536..4d94e6446505 100644
--- a/drivers/soc/qcom/glink_ssr.c
+++ b/drivers/soc/qcom/glink_ssr.c
@@ -80,6 +80,19 @@ struct configure_and_open_ch_work {
};
/**
+ * struct rx_done_ch_work - Work structure used for sending rx_done on
+ * glink_ssr channels
+ * handle: G-Link channel handle to be used for sending rx_done
+ * ptr: Intent pointer data provided in notify rx function
+ * work: Work structure
+ */
+struct rx_done_ch_work {
+ void *handle;
+ const void *ptr;
+ struct work_struct work;
+};
+
+/**
* struct close_ch_work - Work structure for used for closing glink_ssr channels
* edge: The G-Link edge name for the channel being closed
* handle: G-Link channel handle to be closed
@@ -102,6 +115,15 @@ static LIST_HEAD(subsystem_list);
static atomic_t responses_remaining = ATOMIC_INIT(0);
static wait_queue_head_t waitqueue;
+static void rx_done_cb_worker(struct work_struct *work)
+{
+ struct rx_done_ch_work *rx_done_work =
+ container_of(work, struct rx_done_ch_work, work);
+
+ glink_rx_done(rx_done_work->handle, rx_done_work->ptr, false);
+ kfree(rx_done_work);
+}
+
static void link_state_cb_worker(struct work_struct *work)
{
unsigned long flags;
@@ -196,7 +218,14 @@ void glink_ssr_notify_rx(void *handle, const void *priv, const void *pkt_priv,
{
struct ssr_notify_data *cb_data = (struct ssr_notify_data *)priv;
struct cleanup_done_msg *resp = (struct cleanup_done_msg *)ptr;
+ struct rx_done_ch_work *rx_done_work;
+ rx_done_work = kmalloc(sizeof(*rx_done_work), GFP_ATOMIC);
+ if (!rx_done_work) {
+ GLINK_SSR_ERR("<SSR> %s: Could not allocate rx_done_work\n",
+ __func__);
+ return;
+ }
if (unlikely(!cb_data))
goto missing_cb_data;
if (unlikely(!cb_data->do_cleanup_data))
@@ -221,6 +250,10 @@ void glink_ssr_notify_rx(void *handle, const void *priv, const void *pkt_priv,
kfree(cb_data->do_cleanup_data);
cb_data->do_cleanup_data = NULL;
+ rx_done_work->ptr = ptr;
+ rx_done_work->handle = handle;
+ INIT_WORK(&rx_done_work->work, rx_done_cb_worker);
+ queue_work(glink_ssr_wq, &rx_done_work->work);
wake_up(&waitqueue);
return;
diff --git a/drivers/soc/qcom/msm_glink_pkt.c b/drivers/soc/qcom/msm_glink_pkt.c
index 490faf89ab76..9ebc6a3c23c9 100644
--- a/drivers/soc/qcom/msm_glink_pkt.c
+++ b/drivers/soc/qcom/msm_glink_pkt.c
@@ -664,7 +664,16 @@ ssize_t glink_pkt_read(struct file *file,
spin_unlock_irqrestore(&devp->pkt_list_lock, flags);
ret = copy_to_user(buf, pkt->data, pkt->size);
- BUG_ON(ret != 0);
+ if (ret) {
+ GLINK_PKT_ERR(
+ "%s copy_to_user failed ret[%d] on dev id:%d size %zu\n",
+ __func__, ret, devp->i, pkt->size);
+ spin_lock_irqsave(&devp->pkt_list_lock, flags);
+ list_add_tail(&pkt->list, &devp->pkt_list);
+ spin_unlock_irqrestore(&devp->pkt_list_lock, flags);
+ return -EFAULT;
+ }
+
ret = pkt->size;
glink_rx_done(devp->handle, pkt->data, false);
@@ -738,7 +747,13 @@ ssize_t glink_pkt_write(struct file *file,
}
ret = copy_from_user(data, buf, count);
- BUG_ON(ret != 0);
+ if (ret) {
+ GLINK_PKT_ERR(
+ "%s copy_from_user failed ret[%d] on dev id:%d size %zu\n",
+ __func__, ret, devp->i, count);
+ kfree(data);
+ return -EFAULT;
+ }
ret = glink_tx(devp->handle, data, data, count, GLINK_TX_REQ_INTENT);
if (ret) {
diff --git a/drivers/usb/dwc3/dwc3-msm.c b/drivers/usb/dwc3/dwc3-msm.c
index 76bf29e78dad..db74e4f4f4d9 100644
--- a/drivers/usb/dwc3/dwc3-msm.c
+++ b/drivers/usb/dwc3/dwc3-msm.c
@@ -143,6 +143,9 @@ enum plug_orientation {
#define B_SESS_VLD 1
#define B_SUSPEND 2
+#define PM_QOS_SAMPLE_SEC 2
+#define PM_QOS_THRESHOLD 400
+
struct dwc3_msm {
struct device *dev;
void __iomem *base;
@@ -219,6 +222,9 @@ struct dwc3_msm {
unsigned int lpm_to_suspend_delay;
bool init;
enum plug_orientation typec_orientation;
+ int pm_qos_latency;
+ struct pm_qos_request pm_qos_req_dma;
+ struct delayed_work perf_vote_work;
};
#define USB_HSPHY_3P3_VOL_MIN 3050000 /* uV */
@@ -1952,6 +1958,8 @@ static void dwc3_set_phy_speed_flags(struct dwc3_msm *mdwc)
}
}
+static void msm_dwc3_perf_vote_update(struct dwc3_msm *mdwc,
+ bool perf_mode);
static int dwc3_msm_suspend(struct dwc3_msm *mdwc)
{
@@ -1966,6 +1974,9 @@ static int dwc3_msm_suspend(struct dwc3_msm *mdwc)
return 0;
}
+ cancel_delayed_work_sync(&mdwc->perf_vote_work);
+ msm_dwc3_perf_vote_update(mdwc, false);
+
if (!mdwc->in_host_mode) {
/* pending device events unprocessed */
for (i = 0; i < dwc->num_event_buffers; i++) {
@@ -2244,6 +2255,10 @@ static int dwc3_msm_resume(struct dwc3_msm *mdwc)
*/
dwc3_pwr_event_handler(mdwc);
+ if (pm_qos_request_active(&mdwc->pm_qos_req_dma))
+ schedule_delayed_work(&mdwc->perf_vote_work,
+ msecs_to_jiffies(1000 * PM_QOS_SAMPLE_SEC));
+
dbg_event(0xFF, "Ctl Res", atomic_read(&dwc->in_lpm));
return 0;
@@ -2702,6 +2717,7 @@ static ssize_t mode_store(struct device *dev, struct device_attribute *attr,
}
static DEVICE_ATTR_RW(mode);
+static void msm_dwc3_perf_vote_work(struct work_struct *w);
static int dwc3_msm_probe(struct platform_device *pdev)
{
@@ -2737,6 +2753,7 @@ static int dwc3_msm_probe(struct platform_device *pdev)
INIT_WORK(&mdwc->bus_vote_w, dwc3_msm_bus_vote_w);
INIT_WORK(&mdwc->vbus_draw_work, dwc3_msm_vbus_draw_work);
INIT_DELAYED_WORK(&mdwc->sm_work, dwc3_otg_sm_work);
+ INIT_DELAYED_WORK(&mdwc->perf_vote_work, msm_dwc3_perf_vote_work);
mdwc->dwc3_wq = alloc_ordered_workqueue("dwc3_wq", 0);
if (!mdwc->dwc3_wq) {
@@ -3012,6 +3029,13 @@ static int dwc3_msm_probe(struct platform_device *pdev)
if (ret)
goto put_dwc3;
+ ret = of_property_read_u32(node, "qcom,pm-qos-latency",
+ &mdwc->pm_qos_latency);
+ if (ret) {
+ dev_dbg(&pdev->dev, "setting pm-qos-latency to zero.\n");
+ mdwc->pm_qos_latency = 0;
+ }
+
/* Update initial VBUS/ID state from extcon */
if (mdwc->extcon_vbus && extcon_get_cable_state_(mdwc->extcon_vbus,
EXTCON_USB))
@@ -3077,6 +3101,7 @@ static int dwc3_msm_remove(struct platform_device *pdev)
clk_prepare_enable(mdwc->xo_clk);
}
+ cancel_delayed_work_sync(&mdwc->perf_vote_work);
cancel_delayed_work_sync(&mdwc->sm_work);
if (mdwc->hs_phy)
@@ -3162,6 +3187,45 @@ static int dwc3_msm_host_notifier(struct notifier_block *nb,
return NOTIFY_DONE;
}
+static void msm_dwc3_perf_vote_update(struct dwc3_msm *mdwc, bool perf_mode)
+{
+ static bool curr_perf_mode;
+ int latency = mdwc->pm_qos_latency;
+
+ if ((curr_perf_mode == perf_mode) || !latency)
+ return;
+
+ if (perf_mode)
+ pm_qos_update_request(&mdwc->pm_qos_req_dma, latency);
+ else
+ pm_qos_update_request(&mdwc->pm_qos_req_dma,
+ PM_QOS_DEFAULT_VALUE);
+
+ curr_perf_mode = perf_mode;
+ pr_debug("%s: latency updated to: %d\n", __func__,
+ perf_mode ? latency : PM_QOS_DEFAULT_VALUE);
+}
+
+static void msm_dwc3_perf_vote_work(struct work_struct *w)
+{
+ struct dwc3_msm *mdwc = container_of(w, struct dwc3_msm,
+ perf_vote_work.work);
+ struct dwc3 *dwc = platform_get_drvdata(mdwc->dwc3);
+ static unsigned long last_irq_cnt;
+ bool in_perf_mode = false;
+
+ if (dwc->irq_cnt - last_irq_cnt >= PM_QOS_THRESHOLD)
+ in_perf_mode = true;
+
+ pr_debug("%s: in_perf_mode:%u, interrupts in last sample:%lu\n",
+ __func__, in_perf_mode, (dwc->irq_cnt - last_irq_cnt));
+
+ last_irq_cnt = dwc->irq_cnt;
+ msm_dwc3_perf_vote_update(mdwc, in_perf_mode);
+ schedule_delayed_work(&mdwc->perf_vote_work,
+ msecs_to_jiffies(1000 * PM_QOS_SAMPLE_SEC));
+}
+
#define VBUS_REG_CHECK_DELAY (msecs_to_jiffies(1000))
/**
@@ -3267,6 +3331,16 @@ static int dwc3_otg_start_host(struct dwc3_msm *mdwc, int on)
atomic_read(&mdwc->dev->power.usage_count));
pm_runtime_mark_last_busy(mdwc->dev);
pm_runtime_put_sync_autosuspend(mdwc->dev);
+#ifdef CONFIG_SMP
+ mdwc->pm_qos_req_dma.type = PM_QOS_REQ_AFFINE_IRQ;
+ mdwc->pm_qos_req_dma.irq = dwc->irq;
+#endif
+ pm_qos_add_request(&mdwc->pm_qos_req_dma,
+ PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE);
+ /* start in perf mode for better performance initially */
+ msm_dwc3_perf_vote_update(mdwc, true);
+ schedule_delayed_work(&mdwc->perf_vote_work,
+ msecs_to_jiffies(1000 * PM_QOS_SAMPLE_SEC));
} else {
dev_dbg(mdwc->dev, "%s: turn off host\n", __func__);
@@ -3278,6 +3352,10 @@ static int dwc3_otg_start_host(struct dwc3_msm *mdwc, int on)
return ret;
}
+ cancel_delayed_work_sync(&mdwc->perf_vote_work);
+ msm_dwc3_perf_vote_update(mdwc, false);
+ pm_qos_remove_request(&mdwc->pm_qos_req_dma);
+
pm_runtime_get_sync(mdwc->dev);
dbg_event(0xFF, "StopHost gsync",
atomic_read(&mdwc->dev->power.usage_count));
@@ -3359,9 +3437,23 @@ static int dwc3_otg_start_peripheral(struct dwc3_msm *mdwc, int on)
dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE);
usb_gadget_vbus_connect(&dwc->gadget);
+#ifdef CONFIG_SMP
+ mdwc->pm_qos_req_dma.type = PM_QOS_REQ_AFFINE_IRQ;
+ mdwc->pm_qos_req_dma.irq = dwc->irq;
+#endif
+ pm_qos_add_request(&mdwc->pm_qos_req_dma,
+ PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE);
+ /* start in perf mode for better performance initially */
+ msm_dwc3_perf_vote_update(mdwc, true);
+ schedule_delayed_work(&mdwc->perf_vote_work,
+ msecs_to_jiffies(1000 * PM_QOS_SAMPLE_SEC));
} else {
dev_dbg(mdwc->dev, "%s: turn off gadget %s\n",
__func__, dwc->gadget.name);
+ cancel_delayed_work_sync(&mdwc->perf_vote_work);
+ msm_dwc3_perf_vote_update(mdwc, false);
+ pm_qos_remove_request(&mdwc->pm_qos_req_dma);
+
usb_gadget_vbus_disconnect(&dwc->gadget);
usb_phy_notify_disconnect(mdwc->hs_phy, USB_SPEED_HIGH);
usb_phy_notify_disconnect(mdwc->ss_phy, USB_SPEED_SUPER);