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authorTony Truong <truong@codeaurora.org>2016-01-15 14:13:24 -0800
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-23 21:18:14 -0700
commit7daad880e22fdd82d49c0ba8dae3c7df03e66595 (patch)
tree432c28582dc2cf28eac1c51ae1d5374fc907fa66 /drivers
parent99e08a1be6acac69c919eafa34d393874f62ffde (diff)
msm: pcie: mask the aggregated interrupt status register
Aggregated interrupts that are configured to be masked should not be reported in the interrupt handler. Thus, mask the status value being read in the interrupt handler to filter them out. Change-Id: I6b563955309795ac2b68c2527cbd763f9300a029 Signed-off-by: Tony Truong <truong@codeaurora.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pci/host/pci-msm.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/pci/host/pci-msm.c b/drivers/pci/host/pci-msm.c
index a54f6c6bfb77..ebdcce77f895 100644
--- a/drivers/pci/host/pci-msm.c
+++ b/drivers/pci/host/pci-msm.c
@@ -4963,7 +4963,9 @@ static irqreturn_t handle_global_irq(int irq, void *data)
spin_lock_irqsave(&dev->global_irq_lock, irqsave_flags);
- status = readl_relaxed(dev->parf + PCIE20_PARF_INT_ALL_STATUS);
+ status = readl_relaxed(dev->parf + PCIE20_PARF_INT_ALL_STATUS) &
+ readl_relaxed(dev->parf + PCIE20_PARF_INT_ALL_MASK);
+
msm_pcie_write_mask(dev->parf + PCIE20_PARF_INT_ALL_CLEAR, 0, status);
for (i = 0; i <= MSM_PCIE_INT_EVT_MAX; i++) {