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authorDan Williams <dan.j.williams@intel.com>2009-09-08 15:06:10 -0700
committerDan Williams <dan.j.williams@intel.com>2009-09-08 17:56:37 -0700
commit9a8de639f35ca3951b910d5e3a2f92f4cf3afc8f (patch)
tree58d799166b6facdf25e314885ee7fadd20597482 /drivers
parentd8902adcc1a9fd484c8cb5e575152e32192c1ff8 (diff)
async_tx: remove HIGHMEM64G restriction
This restriction prevented ASYNC_TX_DMA from being enabled on platform configurations where DMA address conversion could not be performed in place on the stack. Since commit 04ce9ab3 ("async_xor: permit callers to pass in a 'dma/page scribble' region") the async_tx api now either uses a caller provided 'scribble' buffer, or performs the conversion in place when sizeof(dma_addr_t) <= sizeof(struct page *). Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/dma/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 3230a780c3de..5903a88351bf 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -128,7 +128,7 @@ config NET_DMA
config ASYNC_TX_DMA
bool "Async_tx: Offload support for the async_tx api"
- depends on DMA_ENGINE && !HIGHMEM64G
+ depends on DMA_ENGINE
help
This allows the async_tx api to take advantage of offload engines for
memcpy, memset, xor, and raid6 p+q operations. If your platform has