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authorPeter Korsgaard <jacmet@sunsite.dk>2009-06-03 13:46:54 +0200
committerDavid Woodhouse <David.Woodhouse@intel.com>2009-06-05 21:27:05 +0100
commita755a3858f96ea7e8762ecaac451adfad45321bd (patch)
tree3c5fe7c6d3b6bac164504f48b55b9f08b7ffa787 /drivers
parent31bb999ee73748068ddc271dd99b22dcc418efe3 (diff)
mtd: nand: s3c2410_nand_setrate(): use correct macros for 2412/2440
Use the correct S3C2440_NFCONF_* macros for the mask for the 2412/2440 variants instead of the 2410 ones which use wrong bit positions. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mtd/nand/s3c2410.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 8e375d5fe231..776756e4ebe5 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -215,9 +215,9 @@ static int s3c2410_nand_setrate(struct s3c2410_nand_info *info)
case TYPE_S3C2440:
case TYPE_S3C2412:
- mask = (S3C2410_NFCONF_TACLS(tacls_max - 1) |
- S3C2410_NFCONF_TWRPH0(7) |
- S3C2410_NFCONF_TWRPH1(7));
+ mask = (S3C2440_NFCONF_TACLS(tacls_max - 1) |
+ S3C2440_NFCONF_TWRPH0(7) |
+ S3C2440_NFCONF_TWRPH1(7));
set = S3C2440_NFCONF_TACLS(tacls - 1);
set |= S3C2440_NFCONF_TWRPH0(twrph0 - 1);