diff options
author | Krzysztof Halasa <khc@pm.waw.pl> | 2006-08-16 01:52:23 +0200 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2006-08-19 17:51:25 -0400 |
commit | a76b044af147135b5fb7570aba35d4908f143cc9 (patch) | |
tree | 600000a46abd1ce07ea8e2d73fe0bed1df7178fc /drivers | |
parent | 2ca2d5e84c19ddbc0126087af6288533a05f1799 (diff) |
[PATCH] WAN: fix C101 card carrier handling
Hi,
One of my recent changes broke C101 carrier handling, this patch
fixes it. Also fixes an old TX underrun checking bug.
2.6.18 material. Please apply.
Thanks.
Signed-off-by: Krzysztof Halasa <khc@pm.waw.pl>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/wan/c101.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/net/wan/c101.c b/drivers/net/wan/c101.c index 435e91ec4620..6b63b350cd52 100644 --- a/drivers/net/wan/c101.c +++ b/drivers/net/wan/c101.c @@ -118,7 +118,7 @@ static inline void openwin(card_t *card, u8 page) static inline void set_carrier(port_t *port) { - if (!sca_in(MSCI1_OFFSET + ST3, port) & ST3_DCD) + if (!(sca_in(MSCI1_OFFSET + ST3, port) & ST3_DCD)) netif_carrier_on(port_to_dev(port)); else netif_carrier_off(port_to_dev(port)); @@ -127,10 +127,10 @@ static inline void set_carrier(port_t *port) static void sca_msci_intr(port_t *port) { - u8 stat = sca_in(MSCI1_OFFSET + ST1, port); /* read MSCI ST1 status */ + u8 stat = sca_in(MSCI0_OFFSET + ST1, port); /* read MSCI ST1 status */ - /* Reset MSCI TX underrun status bit */ - sca_out(stat & ST1_UDRN, MSCI0_OFFSET + ST1, port); + /* Reset MSCI TX underrun and CDCD (ignored) status bit */ + sca_out(stat & (ST1_UDRN | ST1_CDCD), MSCI0_OFFSET + ST1, port); if (stat & ST1_UDRN) { struct net_device_stats *stats = hdlc_stats(port_to_dev(port)); @@ -138,6 +138,7 @@ static void sca_msci_intr(port_t *port) stats->tx_fifo_errors++; } + stat = sca_in(MSCI1_OFFSET + ST1, port); /* read MSCI1 ST1 status */ /* Reset MSCI CDCD status bit - uses ch#2 DCD input */ sca_out(stat & ST1_CDCD, MSCI1_OFFSET + ST1, port); |