diff options
| author | Linux Build Service Account <lnxbuild@localhost> | 2018-10-03 19:21:06 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2018-10-03 19:21:06 -0700 |
| commit | aca8b08869e71c1426adfbb042d3bafd5a2f8c87 (patch) | |
| tree | d3ac5cda7b3de3c8bba8a4cb4d0458ea157c378a /drivers | |
| parent | 5feaf32da402451c2051a562cd3623ef1b3d3685 (diff) | |
| parent | cd58da6df0d8ff7a0a0ff4b674d6a5ef1729c0b7 (diff) | |
Merge "pinctrl: qcom: Add UFS_RESET pin data for sdm660"
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pinctrl/qcom/pinctrl-sdm660.c | 30 |
1 files changed, 29 insertions, 1 deletions
diff --git a/drivers/pinctrl/qcom/pinctrl-sdm660.c b/drivers/pinctrl/qcom/pinctrl-sdm660.c index 4dbb4cae2fae..9796bdc7534e 100644 --- a/drivers/pinctrl/qcom/pinctrl-sdm660.c +++ b/drivers/pinctrl/qcom/pinctrl-sdm660.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, The Linux Foundation. All rights reserved. + * Copyright (c) 2016, 2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -92,6 +92,31 @@ .intr_detection_bit = -1, \ .intr_detection_width = -1, \ } + +#define UFS_RESET(pg_name, offset) \ + { \ + .name = #pg_name, \ + .pins = pg_name##_pins, \ + .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \ + .ctl_reg = offset, \ + .io_reg = offset + 0x4, \ + .intr_cfg_reg = 0, \ + .intr_status_reg = 0, \ + .intr_target_reg = 0, \ + .mux_bit = -1, \ + .pull_bit = 3, \ + .drv_bit = 0, \ + .oe_bit = -1, \ + .in_bit = -1, \ + .out_bit = 0, \ + .intr_enable_bit = -1, \ + .intr_status_bit = -1, \ + .intr_target_bit = -1, \ + .intr_raw_status_bit = -1, \ + .intr_polarity_bit = -1, \ + .intr_detection_bit = -1, \ + .intr_detection_width = -1, \ + } static const struct pinctrl_pin_desc sdm660_pins[] = { PINCTRL_PIN(0, "GPIO_0"), PINCTRL_PIN(1, "GPIO_1"), @@ -214,6 +239,7 @@ static const struct pinctrl_pin_desc sdm660_pins[] = { PINCTRL_PIN(118, "SDC2_CMD"), PINCTRL_PIN(119, "SDC2_DATA"), PINCTRL_PIN(120, "SDC1_RCLK"), + PINCTRL_PIN(121, "UFS_RESET"), }; #define DECLARE_MSM_GPIO_PINS(pin) \ @@ -340,6 +366,7 @@ static const unsigned int sdc2_clk_pins[] = { 117 }; static const unsigned int sdc2_cmd_pins[] = { 118 }; static const unsigned int sdc2_data_pins[] = { 119 }; static const unsigned int sdc1_rclk_pins[] = { 120 }; +static const unsigned int ufs_reset_pins[] = { 121 }; enum sdm660_functions { msm_mux_blsp_spi1, @@ -1673,6 +1700,7 @@ static const struct msm_pingroup sdm660_groups[] = { SDC_QDSD_PINGROUP(sdc2_cmd, 0x99b000, 11, 3), SDC_QDSD_PINGROUP(sdc2_data, 0x99b000, 9, 0), SDC_QDSD_PINGROUP(sdc1_rclk, 0x99a000, 15, 0), + UFS_RESET(ufs_reset, 0x9a3000), }; static const struct msm_pinctrl_soc_data sdm660_pinctrl = { |