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authorMatthew Wilcox <matthew@wil.cx>2006-03-28 11:03:44 -0500
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-04-13 10:13:23 -0500
commitb6d105d7ee188040a6e5eb86101e7476d94b3076 (patch)
tree88a74366e7504c9d6046d243615e758a5b24a20e /drivers
parent1f61d82490a26dbcde903b33e24f6d11b758b64c (diff)
[SCSI] Use pcibios_resource_to_bus()
We had our own code (pci_get_base_address()) to get the bus address of a BAR. We can get this using pcibios_resource_to_bus() instead. Signed-off-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/scsi/sym53c8xx_2/sym_glue.c55
1 files changed, 13 insertions, 42 deletions
diff --git a/drivers/scsi/sym53c8xx_2/sym_glue.c b/drivers/scsi/sym53c8xx_2/sym_glue.c
index ec9d93aa160d..e6ff89a8524c 100644
--- a/drivers/scsi/sym53c8xx_2/sym_glue.c
+++ b/drivers/scsi/sym53c8xx_2/sym_glue.c
@@ -134,45 +134,6 @@ static void sym2_setup_params(void)
}
}
-/*
- * We used to try to deal with 64-bit BARs here, but don't any more.
- * There are many parts of this driver which would need to be modified
- * to handle a 64-bit base address, including scripts. I'm uncomfortable
- * with making those changes when I have no way of testing it, so I'm
- * just going to disable it.
- *
- * Note that some machines (eg HP rx8620 and Superdome) have bus addresses
- * below 4GB and physical addresses above 4GB. These will continue to work.
- */
-static int __devinit
-pci_get_base_address(struct pci_dev *pdev, int index, unsigned long *basep)
-{
- u32 tmp;
- unsigned long base;
-#define PCI_BAR_OFFSET(index) (PCI_BASE_ADDRESS_0 + (index<<2))
-
- pci_read_config_dword(pdev, PCI_BAR_OFFSET(index++), &tmp);
- base = tmp;
- if ((tmp & 0x7) == PCI_BASE_ADDRESS_MEM_TYPE_64) {
- pci_read_config_dword(pdev, PCI_BAR_OFFSET(index++), &tmp);
- if (tmp > 0) {
- dev_err(&pdev->dev,
- "BAR %d is 64-bit, disabling\n", index - 1);
- base = 0;
- }
- }
-
- if ((base & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
- base &= PCI_BASE_ADDRESS_IO_MASK;
- } else {
- base &= PCI_BASE_ADDRESS_MEM_MASK;
- }
-
- *basep = base;
- return index;
-#undef PCI_BAR_OFFSET
-}
-
static struct scsi_transport_template *sym2_transport_template = NULL;
/*
@@ -1866,13 +1827,23 @@ static int __devinit sym_set_workarounds(struct sym_device *device)
static void __devinit
sym_init_device(struct pci_dev *pdev, struct sym_device *device)
{
- int i;
+ int i = 2;
+ struct pci_bus_region bus_addr;
device->host_id = SYM_SETUP_HOST_ID;
device->pdev = pdev;
- i = pci_get_base_address(pdev, 1, &device->mmio_base);
- pci_get_base_address(pdev, i, &device->ram_base);
+ pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[1]);
+ device->mmio_base = bus_addr.start;
+
+ /*
+ * If the BAR is 64-bit, resource 2 will be occupied by the
+ * upper 32 bits
+ */
+ if (!pdev->resource[i].flags)
+ i++;
+ pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[i]);
+ device->ram_base = bus_addr.start;
#ifdef CONFIG_SCSI_SYM53C8XX_MMIO
if (device->mmio_base)