diff options
| author | Deepak Katragadda <dkatraga@codeaurora.org> | 2016-03-23 13:29:36 -0700 |
|---|---|---|
| committer | Jeevan Shriram <jshriram@codeaurora.org> | 2016-04-04 19:30:31 -0700 |
| commit | b703a9cdd38fb951454bde97bbb88ac4aaea13d4 (patch) | |
| tree | f025d1543fcec14ce28787890a774fab5eba7ddd /drivers | |
| parent | ae8eef27c36e4f781982da17fd2feabd8156e941 (diff) | |
clk: msm: clock-mmss-cobalt: Update clock frequencies
There have been some updates to the multimedia clock frequency
plan on MSMCOBALT. Reflect these in the linux clock driver as
well.
CRs-Fixed: 994012
Change-Id: If787e92dbd59b9147d44a53fa3d35d3b3bcfc3d9
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/msm/clock-mmss-cobalt.c | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/drivers/clk/msm/clock-mmss-cobalt.c b/drivers/clk/msm/clock-mmss-cobalt.c index 5a18473023d9..ba9196b7abc9 100644 --- a/drivers/clk/msm/clock-mmss-cobalt.c +++ b/drivers/clk/msm/clock-mmss-cobalt.c @@ -226,7 +226,8 @@ static struct rcg_clk ahb_clk_src = { .c = { .dbg_name = "ahb_clk_src", .ops = &clk_ops_rcg, - VDD_DIG_FMAX_MAP2(LOWER, 40000000, NOMINAL, 80800000), + VDD_DIG_FMAX_MAP3(LOWER, 19200000, LOW, 40000000, + NOMINAL, 80800000), CLK_INIT(ahb_clk_src.c), }, }; @@ -392,13 +393,8 @@ static struct rcg_clk jpeg0_clk_src = { }; static struct clk_freq_tbl ftbl_rot_clk_src[] = { - F_MM( 85714286, mmsscc_gpll0, 7, 0, 0), - F_MM( 100000000, mmsscc_gpll0, 6, 0, 0), F_MM( 171428571, mmsscc_gpll0, 3.5, 0, 0), - F_MM( 150000000, mmsscc_gpll0, 4, 0, 0), - F_MM( 200000000, mmsscc_gpll0, 3, 0, 0), F_MM( 275000000, mmpll5_pll_out, 3, 0, 0), - F_MM( 300000000, mmsscc_gpll0, 2, 0, 0), F_MM( 330000000, mmpll5_pll_out, 2.5, 0, 0), F_MM( 412500000, mmpll5_pll_out, 2, 0, 0), F_END @@ -885,7 +881,7 @@ static struct rcg_clk dp_gtc_clk_src = { .c = { .dbg_name = "dp_gtc_clk_src", .ops = &clk_ops_rcg, - VDD_DIG_FMAX_MAP2(LOWER, 40000000, NOMINAL, 300000000), + VDD_DIG_FMAX_MAP2(LOWER, 40000000, LOW, 300000000), CLK_INIT(dp_gtc_clk_src.c), }, }; @@ -940,7 +936,8 @@ static struct rcg_clk extpclk_clk_src = { .dbg_name = "extpclk_clk_src", .parent = &ext_extpclk_clk_src.c, .ops = &clk_ops_byte, - VDD_DIG_FMAX_MAP2(LOWER, 150000000, NOMINAL, 600000000), + VDD_DIG_FMAX_MAP3(LOWER, 150000000, LOW, 300000000, + NOMINAL, 600000000), CLK_INIT(extpclk_clk_src.c), }, }; |