clk: qcom: Add support for clk_set_flags for branch and dummy clock

Add support to allow setting various flags on the branch clock
pertaining to PERIPH, RETAIN_PERIPH, RETAIN_MEM set and clear by clients
which require this support.

Change-Id: I59ddc1b3b677bd0d7fa838afc9a6cbfc10f98409
Signed-off-by: Taniya Das <tdas@codeaurora.org>

3 files changed, 63 insertions, 0 deletions

diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c
index 76310e249fb2..0987c8e7f807 100644
--- a/drivers/clk/qcom/clk-branch.c
+++ b/drivers/clk/qcom/clk-branch.c
@@ -125,15 +125,62 @@ static int clk_branch_enable(struct clk_hw *hw)
 	return clk_branch_toggle(hw, true, clk_branch_check_halt);
 }
 
+static int clk_cbcr_set_flags(struct regmap *regmap, unsigned int reg,
+				unsigned long flags)
+{
+	u32 cbcr_val;
+
+	regmap_read(regmap, reg, &cbcr_val);
+
+	switch (flags) {
+	case CLKFLAG_PERIPH_OFF_SET:
+		cbcr_val |= BIT(12);
+		break;
+	case CLKFLAG_PERIPH_OFF_CLEAR:
+		cbcr_val &= ~BIT(12);
+		break;
+	case CLKFLAG_RETAIN_PERIPH:
+		cbcr_val |= BIT(13);
+		break;
+	case CLKFLAG_NORETAIN_PERIPH:
+		cbcr_val &= ~BIT(13);
+		break;
+	case CLKFLAG_RETAIN_MEM:
+		cbcr_val |= BIT(14);
+		break;
+	case CLKFLAG_NORETAIN_MEM:
+		cbcr_val &= ~BIT(14);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	regmap_write(regmap, reg, cbcr_val);
+
+	/* Make sure power is enabled/disabled before returning. */
+	mb();
+	udelay(1);
+
+	return 0;
+}
+
 static void clk_branch_disable(struct clk_hw *hw)
 {
 	clk_branch_toggle(hw, false, clk_branch_check_halt);
 }
 
+static int clk_branch_set_flags(struct clk_hw *hw, unsigned flags)
+{
+	struct clk_branch *br = to_clk_branch(hw);
+
+	return clk_cbcr_set_flags(br->clkr.regmap, br->halt_reg, flags);
+}
+
 const struct clk_ops clk_branch_ops = {
 	.enable = clk_branch_enable,
 	.disable = clk_branch_disable,
 	.is_enabled = clk_is_enabled_regmap,
+	.set_flags = clk_branch_set_flags,
 };
 EXPORT_SYMBOL_GPL(clk_branch_ops);
 
@@ -151,6 +198,7 @@ const struct clk_ops clk_branch2_ops = {
 	.enable = clk_branch2_enable,
 	.disable = clk_branch2_disable,
 	.is_enabled = clk_is_enabled_regmap,
+	.set_flags = clk_branch_set_flags,
 };
 EXPORT_SYMBOL_GPL(clk_branch2_ops);
 
diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h
index 915c54f9351f..331f58d651e5 100644
--- a/drivers/clk/qcom/clk-branch.h
+++ b/drivers/clk/qcom/clk-branch.h
@@ -73,4 +73,13 @@ extern const struct clk_ops clk_branch_simple_ops;
 #define to_clk_gate2(_hw) \
 	container_of(to_clk_regmap(_hw), struct clk_gate2, clkr)
 
+enum branch_mem_flags {
+	CLKFLAG_RETAIN_PERIPH,
+	CLKFLAG_NORETAIN_PERIPH,
+	CLKFLAG_RETAIN_MEM,
+	CLKFLAG_NORETAIN_MEM,
+	CLKFLAG_PERIPH_OFF_SET,
+	CLKFLAG_PERIPH_OFF_CLEAR,
+};
+
 #endif
diff --git a/drivers/clk/qcom/clk-dummy.c b/drivers/clk/qcom/clk-dummy.c
index b62277e74f68..e06a829e508c 100644
--- a/drivers/clk/qcom/clk-dummy.c
+++ b/drivers/clk/qcom/clk-dummy.c
@@ -55,10 +55,16 @@ static unsigned long dummy_clk_recalc_rate(struct clk_hw *hw,
 	return dummy->rrate;
 }
 
+static int dummy_clk_set_flags(struct clk_hw *hw, unsigned flags)
+{
+	return 0;
+}
+
 struct clk_ops clk_dummy_ops = {
 	.set_rate = dummy_clk_set_rate,
 	.round_rate = dummy_clk_round_rate,
 	.recalc_rate = dummy_clk_recalc_rate,
+	.set_flags = dummy_clk_set_flags,
 };
 EXPORT_SYMBOL_GPL(clk_dummy_ops);