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authorGeorgi Djakov <gdjako@codeaurora.org>2014-07-31 16:40:32 +0300
committerSubhash Jadavani <subhashj@codeaurora.org>2016-05-19 18:35:48 -0700
commitd51a3603b4c53412002b356f6c7f3d9363229704 (patch)
treec7578493b30edb1538b0ec7fb22581a2c6002c70 /drivers
parent7cc9ec9f2a3a92def752ed31253fa0b89484b39f (diff)
mmc: sdhci-msm: adapt to allow drop-in use in place of downstream driver
In order for this driver to function as a drop-in replacement for the msm-3.10 driver: - Allow selectability on ARCH_MSM - Rename clock names to include _clk prefix - Change supported compatible string Change-Id: I20bc683512ebdd22fcd7845c7e43dd645a2f146f Signed-off-by: Georgi Djakov <gdjako@codeaurora.org> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> [venkatg@codeaurora.org: fix kconfig options conflict] Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/host/Kconfig2
-rw-r--r--drivers/mmc/host/sdhci-msm.c16
2 files changed, 13 insertions, 5 deletions
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 1dee533634c9..c27e80f79fc2 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -406,7 +406,7 @@ config MMC_ATMELMCI
config MMC_SDHCI_MSM
tristate "Qualcomm SDHCI Controller Support"
- depends on ARCH_QCOM || (ARM && COMPILE_TEST)
+ depends on ARCH_QCOM || ARCH_MSM || (ARM && COMPILE_TEST)
depends on MMC_SDHCI_PLTFM
help
This selects the Secure Digital Host Controller Interface (SDHCI)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 4695bee203ea..f6c6bd303050 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -31,6 +31,8 @@
#define HC_MODE_EN 0x1
#define CORE_POWER 0x0
#define CORE_SW_RST BIT(7)
+#define CORE_HC_SELECT_IN_EN (1 << 18)
+#define CORE_HC_SELECT_IN_MASK (7 << 19)
#define MAX_PHASES 16
#define CORE_DLL_LOCK BIT(7)
@@ -412,7 +414,7 @@ retry:
}
static const struct of_device_id sdhci_msm_dt_match[] = {
- { .compatible = "qcom,sdhci-msm-v4" },
+ { .compatible = "qcom,sdhci-msm" },
{},
};
@@ -458,7 +460,7 @@ static int sdhci_msm_probe(struct platform_device *pdev)
sdhci_get_of_property(pdev);
/* Setup SDCC bus voter clock. */
- msm_host->bus_clk = devm_clk_get(&pdev->dev, "bus");
+ msm_host->bus_clk = devm_clk_get(&pdev->dev, "bus_clk");
if (!IS_ERR(msm_host->bus_clk)) {
/* Vote for max. clk rate for max. performance */
ret = clk_set_rate(msm_host->bus_clk, INT_MAX);
@@ -470,7 +472,7 @@ static int sdhci_msm_probe(struct platform_device *pdev)
}
/* Setup main peripheral bus clock */
- msm_host->pclk = devm_clk_get(&pdev->dev, "iface");
+ msm_host->pclk = devm_clk_get(&pdev->dev, "iface_clk");
if (IS_ERR(msm_host->pclk)) {
ret = PTR_ERR(msm_host->pclk);
dev_err(&pdev->dev, "Perpheral clk setup failed (%d)\n", ret);
@@ -482,7 +484,7 @@ static int sdhci_msm_probe(struct platform_device *pdev)
goto bus_clk_disable;
/* Setup SDC MMC clock */
- msm_host->clk = devm_clk_get(&pdev->dev, "core");
+ msm_host->clk = devm_clk_get(&pdev->dev, "core_clk");
if (IS_ERR(msm_host->clk)) {
ret = PTR_ERR(msm_host->clk);
dev_err(&pdev->dev, "SDC MMC clk setup failed (%d)\n", ret);
@@ -507,6 +509,12 @@ static int sdhci_msm_probe(struct platform_device *pdev)
goto clk_disable;
}
+ /* Disable mode selection via the vendor specific register */
+ writel_relaxed((readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC)
+ & ~CORE_HC_SELECT_IN_EN
+ & ~CORE_HC_SELECT_IN_MASK),
+ host->ioaddr + CORE_VENDOR_SPEC);
+
/* Reset the core and Enable SDHC mode */
writel_relaxed(readl_relaxed(msm_host->core_mem + CORE_POWER) |
CORE_SW_RST, msm_host->core_mem + CORE_POWER);