diff options
| author | Runmin Wang <runminw@codeaurora.org> | 2016-05-12 15:01:01 -0700 |
|---|---|---|
| committer | Jeevan Shriram <jshriram@codeaurora.org> | 2016-05-15 22:40:59 -0700 |
| commit | dc2b0c10a106b71c995617c0c78fc216585a4390 (patch) | |
| tree | 539462beb2f54c4fe9c5e99d0320488c0e7f3150 /drivers | |
| parent | b4b947c1f3bf1a39bba5fc324ca56e47d790a962 (diff) | |
pinctrl: qcom: Fix the base address of various GPIOs
Update the base address of GPIOs to the correct value.
CRs-Fixed: 1014950
Change-Id: Id232492bd458dac04e89a94ed5a85092223ebff6
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pinctrl/qcom/pinctrl-msmcobalt.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/pinctrl/qcom/pinctrl-msmcobalt.c b/drivers/pinctrl/qcom/pinctrl-msmcobalt.c index 4cd33a6640c6..039da7b0997b 100644 --- a/drivers/pinctrl/qcom/pinctrl-msmcobalt.c +++ b/drivers/pinctrl/qcom/pinctrl-msmcobalt.c @@ -1677,9 +1677,9 @@ static const struct msm_pingroup msmcobalt_groups[] = { PINGROUP(34, EAST, hdmi_hot, edp_hot, blsp_spi2, blsp_uart2_a, blsp_uim2_a, NA, NA, NA, NA), PINGROUP(35, NORTH, pci_e0, jitter_bist, NA, NA, NA, NA, NA, NA, NA), - PINGROUP(36, WEST, pci_e0, agera_pll, NA, atest_tsens, NA, NA, NA, NA, + PINGROUP(36, NORTH, pci_e0, agera_pll, NA, atest_tsens, NA, NA, NA, NA, NA), - PINGROUP(37, WEST, agera_pll, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(37, NORTH, agera_pll, NA, NA, NA, NA, NA, NA, NA, NA), PINGROUP(38, WEST, usb_phy, NA, NA, NA, NA, NA, NA, NA, NA), PINGROUP(39, WEST, lpass_slimbus, NA, NA, NA, NA, NA, NA, NA, NA), PINGROUP(40, EAST, sd_write, tsif1_error, NA, NA, NA, NA, NA, NA, NA), @@ -1717,13 +1717,13 @@ static const struct msm_pingroup msmcobalt_groups[] = { NA, NA), PINGROUP(57, WEST, qua_mi2s, blsp10_spi, gcc_gp1_a, NA, NA, NA, NA, NA, NA), - PINGROUP(58, NORTH, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_uim8_b, + PINGROUP(58, WEST, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_uim8_b, gcc_gp2_a, NA, qdss_cti1_a, NA, NA), - PINGROUP(59, NORTH, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_uim8_b, + PINGROUP(59, WEST, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_uim8_b, gcc_gp3_a, NA, qdss_cti1_a, NA, NA), - PINGROUP(60, NORTH, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_i2c11, + PINGROUP(60, WEST, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_i2c11, cri_trng0, NA, NA, NA, NA), - PINGROUP(61, NORTH, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_i2c11, + PINGROUP(61, WEST, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_i2c11, cri_trng1, NA, NA, NA, NA), PINGROUP(62, WEST, qua_mi2s, cri_trng, NA, NA, NA, NA, NA, NA, NA), PINGROUP(63, WEST, qua_mi2s, NA, NA, NA, NA, NA, NA, NA, NA), |