diff options
| author | Mitchel Humpherys <mitchelh@codeaurora.org> | 2016-06-07 14:17:14 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2017-01-04 14:18:44 -0800 |
| commit | eb225221bdad0929b5ae10858ae517e42aa64636 (patch) | |
| tree | f15336ab5a1274b3197137c43e8c4b319a69e406 /drivers | |
| parent | ae6c639d2d6c03f1c4fa0762844c71f6973718be (diff) | |
iommu/io-pgtable-fast: Support SMMU coherent page tables
Some SMMUs can walk page tables in the CPU cache. Enable this
behavior for SMMUs whose device tree node has the `coherent' property
set.
Change-Id: I7b00bc7746dafe99b392be02fee8a3e8903427a5
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/iommu/io-pgtable-fast.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/iommu/io-pgtable-fast.c b/drivers/iommu/io-pgtable-fast.c index 9a25ebfdc778..d3357573d7bb 100644 --- a/drivers/iommu/io-pgtable-fast.c +++ b/drivers/iommu/io-pgtable-fast.c @@ -428,9 +428,14 @@ av8l_fast_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) cfg->pgsize_bitmap = SZ_4K; /* TCR */ - reg = (AV8L_FAST_TCR_SH_IS << AV8L_FAST_TCR_SH0_SHIFT) | - (AV8L_FAST_TCR_RGN_NC << AV8L_FAST_TCR_IRGN0_SHIFT) | - (AV8L_FAST_TCR_RGN_NC << AV8L_FAST_TCR_ORGN0_SHIFT); + if (cfg->iommu_dev && cfg->iommu_dev->archdata.dma_coherent) + reg = (AV8L_FAST_TCR_SH_OS << AV8L_FAST_TCR_SH0_SHIFT) | + (AV8L_FAST_TCR_RGN_WBWA << AV8L_FAST_TCR_IRGN0_SHIFT) | + (AV8L_FAST_TCR_RGN_WBWA << AV8L_FAST_TCR_ORGN0_SHIFT); + else + reg = (AV8L_FAST_TCR_SH_IS << AV8L_FAST_TCR_SH0_SHIFT) | + (AV8L_FAST_TCR_RGN_NC << AV8L_FAST_TCR_IRGN0_SHIFT) | + (AV8L_FAST_TCR_RGN_NC << AV8L_FAST_TCR_ORGN0_SHIFT); reg |= AV8L_FAST_TCR_TG0_4K; |