diff options
| author | Sahitya Tummala <stummala@codeaurora.org> | 2013-04-12 12:11:20 +0530 |
|---|---|---|
| committer | Subhash Jadavani <subhashj@codeaurora.org> | 2016-05-27 10:28:36 -0700 |
| commit | 3ee34aae161d82aefe775805a8ce66caffbe5569 (patch) | |
| tree | 95838dcd68c9412ed8a52e121a6363ee04c27e9f /firmware/tehuti | |
| parent | 61b4aff312c9c4d483b3355ec7e4f29c17d56f9c (diff) | |
mmc: sdhci-msm: Do not enable preset value
If preset value (bit 15) is enabled in sdhci host control2
register (0x3E), then the preset value registers(0x6F-0x60)
would be used for some of the settings such as clock and
drive strength. These are HW initialized registers and are
not properly initialized by MSM SDHCI controller. This is
resulting in low throughput for some of the modes such as
DDR50/SDR50. Hence, do not enable it for MSM SDHCI.
CRs-fixed: 474518
Change-Id: Iee1241355d14e6bcebc66c3a43abf1ec94d869c3
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
[subhashj@codeaurora.org: fixed minor merge conflict]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Diffstat (limited to 'firmware/tehuti')
0 files changed, 0 insertions, 0 deletions