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authorGavin Shan <shangw@linux.vnet.ibm.com>2012-08-20 03:49:16 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2012-09-17 16:35:14 +1000
commit11685becbf1a962759ae94a0fdb5b0b7521778a5 (patch)
tree0457f8d2993242ed933b623b22344076a6aaf551 /firmware
parent7ebdf956df7961ae6b57b0328e03d33f95f1346f (diff)
powerpc/powernv: I/O and MMIO resource assignment for PEs
There're 2 types of PCI bus sensitive PEs: (A) The PE includes single PCI bus. (B) The PE includes the PCI bus and all the subordinate PCI buses, and the patch tries to assign I/O and MMIO resources based on created PEs. Fortunately, we figured out unified scheme to do resource assignment for all types of PCI bus based PEs according to Ben's idea: - Resource assignment based on PE from top to bottom. - The soureces, either I/O or MMIO, of the PE are figured out from the assigned PCI bus. - The occupied resource by parent PE could possibilly be overrided by children PEs. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Reviewed-by: Ram Pai <linuxram@us.ibm.com> Reviewed-by: Richard Yang <weiyang@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'firmware')
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