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author | Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | 2018-07-14 02:37:21 -0700 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-07-25 10:18:28 +0200 |
commit | 6e2119e4b8767a6c3a415875ad09596ada00755c (patch) | |
tree | 1176b22e1bf5107c3901445ae6bd6eec62cb9d02 /fs/proc/array.c | |
parent | afc6bf9131efc36d4ae8a003e8597119a2190661 (diff) |
x86/bugs: Rename _RDS to _SSBD
commit 9f65fb29374ee37856dbad847b4e121aab72b510 upstream
Intel collateral will reference the SSB mitigation bit in IA32_SPEC_CTL[2]
as SSBD (Speculative Store Bypass Disable).
Hence changing it.
It is unclear yet what the MSR_IA32_ARCH_CAPABILITIES (0x10a) Bit(4) name
is going to be. Following the rename it would be SSBD_NO but that rolls out
to Speculative Store Bypass Disable No.
Also fixed the missing space in X86_FEATURE_AMD_SSBD.
[ tglx: Fixup x86_amd_rds_enable() and rds_tif_to_amd_ls_cfg() as well ]
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Srivatsa: Backported to 4.4.y, skipping the KVM changes in this patch. ]
Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu>
Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com>
Reviewed-by: Alexey Makhalov <amakhalov@vmware.com>
Reviewed-by: Bo Gan <ganb@vmware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'fs/proc/array.c')
0 files changed, 0 insertions, 0 deletions