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authorPavel Pisa <ppisa@pikron.com>2007-05-12 14:31:17 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-07-12 11:11:39 +0100
commitb3e6a508ed920698d367e5993ed056d70364d91f (patch)
tree4097af7112f18f4e610d16d46c95746f6d1621a6 /include/asm-arm/arch-imx/imx-regs.h
parent7dcca30a32aadb0520417521b0c44f42d09fe05c (diff)
[ARM] 4373/1: i.MX/MX1 GPIO support implementation
Support for generic input output for MX1 family. The implementation prevents allocation of one pin by two users, but does not store pointer to the user description permanently, because this solution would have bigger memory overhead. The simple way to integrate code with per BSP pins setup and allocation is required else all GPIO registration checking is useless. The function imx_gpio_setup_multiple_pins() can be used for this purpose in future. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-imx/imx-regs.h')
-rw-r--r--include/asm-arm/arch-imx/imx-regs.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-arm/arch-imx/imx-regs.h b/include/asm-arm/arch-imx/imx-regs.h
index 30de404c61f5..fb9de2733879 100644
--- a/include/asm-arm/arch-imx/imx-regs.h
+++ b/include/asm-arm/arch-imx/imx-regs.h
@@ -77,6 +77,8 @@
#define SWR(x) __REG2(IMX_GPIO_BASE + 0x3c, ((x) & 3) << 8)
#define PUEN(x) __REG2(IMX_GPIO_BASE + 0x40, ((x) & 3) << 8)
+#define GPIO_PORT_MAX 3
+
#define GPIO_PIN_MASK 0x1f
#define GPIO_PORT_MASK (0x3 << 5)