diff options
| author | Ingo Molnar <mingo@elte.hu> | 2008-10-12 15:05:39 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-10-12 15:05:39 +0200 |
| commit | a9b9e81c915e4a57ac3b21d1a7fa7ff184639780 (patch) | |
| tree | 98304395fbb5b9c74fca35b196cd414c1949f280 /include/asm-mips/mach-cobalt/irq.h | |
| parent | a8b71a2810386a5ac8f43d2095fe3355f0d8db37 (diff) | |
| parent | fd048088306656824958e7783ffcee27e241b361 (diff) | |
Merge branch 'linus' into x86/memory-corruption-check
Diffstat (limited to 'include/asm-mips/mach-cobalt/irq.h')
| -rw-r--r-- | include/asm-mips/mach-cobalt/irq.h | 57 |
1 files changed, 0 insertions, 57 deletions
diff --git a/include/asm-mips/mach-cobalt/irq.h b/include/asm-mips/mach-cobalt/irq.h deleted file mode 100644 index 57c8c9ac5851..000000000000 --- a/include/asm-mips/mach-cobalt/irq.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Cobalt IRQ definitions. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1997 Cobalt Microserver - * Copyright (C) 1997, 2003 Ralf Baechle - * Copyright (C) 2001-2003 Liam Davies (ldavies@agile.tv) - * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> - */ -#ifndef _ASM_COBALT_IRQ_H -#define _ASM_COBALT_IRQ_H - -/* - * i8259 interrupts used on Cobalt: - * - * 8 - RTC - * 9 - PCI slot - * 14 - IDE0 - * 15 - IDE1(no connector on board) - */ -#define I8259A_IRQ_BASE 0 - -#define PCISLOT_IRQ (I8259A_IRQ_BASE + 9) - -/* - * CPU interrupts used on Cobalt: - * - * 0 - Software interrupt 0 (unused) - * 1 - Software interrupt 0 (unused) - * 2 - cascade GT64111 - * 3 - ethernet or SCSI host controller - * 4 - ethernet - * 5 - 16550 UART - * 6 - cascade i8259 - * 7 - CP0 counter - */ -#define MIPS_CPU_IRQ_BASE 16 - -#define GT641XX_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 2) -#define RAQ2_SCSI_IRQ (MIPS_CPU_IRQ_BASE + 3) -#define ETH0_IRQ (MIPS_CPU_IRQ_BASE + 3) -#define QUBE1_ETH0_IRQ (MIPS_CPU_IRQ_BASE + 4) -#define ETH1_IRQ (MIPS_CPU_IRQ_BASE + 4) -#define SERIAL_IRQ (MIPS_CPU_IRQ_BASE + 5) -#define SCSI_IRQ (MIPS_CPU_IRQ_BASE + 5) -#define I8259_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 6) - -#define GT641XX_IRQ_BASE 24 - -#include <asm/irq_gt641xx.h> - -#define NR_IRQS (GT641XX_PCI_INT3_IRQ + 1) - -#endif /* _ASM_COBALT_IRQ_H */ |