diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2006-06-07 20:13:20 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-06-19 17:39:21 +0100 |
| commit | 3e0ba410a5d5595c2b79ecbfb85fb2466b998680 (patch) | |
| tree | 22f2044fb6f8c630b02c1c86cc7a96ed017395d0 /include/asm-mips/sn/sn0 | |
| parent | 8f2f360da9262091153c97d756c40eabdde75f1a (diff) | |
[MIPS] IP27: Remove #if 0'ed code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/sn/sn0')
| -rw-r--r-- | include/asm-mips/sn/sn0/hubio.h | 16 | ||||
| -rw-r--r-- | include/asm-mips/sn/sn0/hubpi.h | 18 |
2 files changed, 0 insertions, 34 deletions
diff --git a/include/asm-mips/sn/sn0/hubio.h b/include/asm-mips/sn/sn0/hubio.h index f314da21b970..ef91b3363554 100644 --- a/include/asm-mips/sn/sn0/hubio.h +++ b/include/asm-mips/sn/sn0/hubio.h @@ -486,22 +486,6 @@ typedef union h1_icrba_u { #define ICRBN_A_CERR_SHFT 54 #define ICRBN_A_ERR_MASK 0x3ff -#if 0 /* Disabled, this causes namespace polution and break allmodconfig */ -/* - * Easy access macros. - */ -#define a_error icrba_fields_s.error -#define a_ecode icrba_fields_s.ecode -#define a_lnetuce icrba_fields_s.lnetuce -#define a_mark icrba_fields_s.mark -#define a_xerr icrba_fields_s.xerr -#define a_sidn icrba_fields_s.sidn -#define a_tnum icrba_fields_s.tnum -#define a_addr icrba_fields_s.addr -#define a_valid icrba_fields_s.valid -#define a_iow icrba_fields_s.iow -#endif - #endif /* !__ASSEMBLY__ */ #define IIO_ICRB_ADDR_SHFT 2 /* Shift to get proper address */ diff --git a/include/asm-mips/sn/sn0/hubpi.h b/include/asm-mips/sn/sn0/hubpi.h index 355bba8552e3..e39f5f9da040 100644 --- a/include/asm-mips/sn/sn0/hubpi.h +++ b/include/asm-mips/sn/sn0/hubpi.h @@ -398,24 +398,6 @@ typedef u64 rtc_time_t; /* PI_RT_FILTER_CTRL mask and shift definitions */ -#if 0 -/* - * XXX - This register's definition has changed, but it's only implemented - * in Hub 2. - */ -#define PRFC_DROP_COUNT_SHFT 27 -#define PRFC_DROP_COUNT_MASK (UINT64_CAST 0x3ff << 27) -#define PRFC_DROP_CTR_SHFT 18 -#define PRFC_DROP_CTR_MASK (UINT64_CAST 0x1ff << 18) -#define PRFC_MASK_ENABLE_SHFT 10 -#define PRFC_MASK_ENABLE_MASK (UINT64_CAST 0x7f << 10) -#define PRFC_MASK_CTR_SHFT 2 -#define PRFC_MASK_CTR_MASK (UINT64_CAST 0xff << 2) -#define PRFC_OFFSET_SHFT 0 -#define PRFC_OFFSET_MASK (UINT64_CAST 3) -#endif /* 0 */ - - /* * Bits for NACK_CNT_A/B and NACK_CMP */ |