diff options
| author | Deepak Katragadda <dkatraga@codeaurora.org> | 2016-06-30 17:11:49 -0700 |
|---|---|---|
| committer | Deepak Katragadda <dkatraga@codeaurora.org> | 2016-07-15 13:33:09 -0700 |
| commit | 3ec715adbe386241017f5c7daa8ecf217fd84f3b (patch) | |
| tree | fe58b6ad5921b84690587335b8e8c09edb5f1c34 /include/dt-bindings | |
| parent | ea475748cae7c85568840b9259fba189f80f1b21 (diff) | |
clk: msm: clock-gcc-cobalt: Remove support for gcc_bimc_hmss_axi_clk
The gcc_bimc_hmss_axi_clk will be configured outside of HLOS.
The linux clock driver does not need to manually enable it.
CRs-Fixed: 1012646
Change-Id: Ib0b848fb410f4bf266b09cefed0e8bce7292d2ec
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/msm-clocks-cobalt.h | 1 | ||||
| -rw-r--r-- | include/dt-bindings/clock/msm-clocks-hwio-cobalt.h | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/include/dt-bindings/clock/msm-clocks-cobalt.h b/include/dt-bindings/clock/msm-clocks-cobalt.h index 5cdeb01a173b..47cd73b08a83 100644 --- a/include/dt-bindings/clock/msm-clocks-cobalt.h +++ b/include/dt-bindings/clock/msm-clocks-cobalt.h @@ -197,7 +197,6 @@ #define clk_gcc_gpu_snoc_dvm_gfx_clk 0xc9147451 #define clk_gcc_gpu_bimc_gfx_clk 0x3909459b #define clk_gcc_gpu_bimc_gfx_src_clk 0x377cb748 -#define clk_gcc_bimc_hmss_axi_clk 0x84653931 #define clk_gcc_gpu_cfg_ahb_clk 0x72f20a57 #define clk_gcc_gpu_iref_clk 0xfd82abad #define clk_gcc_hmss_ahb_clk 0x62818713 diff --git a/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h b/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h index af26f826e18c..757344602f4a 100644 --- a/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h +++ b/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h @@ -171,7 +171,6 @@ #define GCC_GPU_CFG_AHB_CBCR 0x71004 #define GCC_GPU_SNOC_DVM_GFX_CBCR 0x71018 #define GCC_GPU_IREF_EN 0x88010 -#define GCC_BIMC_HMSS_AXI_CBCR 0x48004 #define GCC_HMSS_AHB_CBCR 0x48000 #define GCC_HMSS_DVM_BUS_CBCR 0x4808C #define GCC_HMSS_RBCPR_CBCR 0x48008 |