diff options
| author | Vikram Mulukutla <markivx@codeaurora.org> | 2015-09-30 16:51:23 -0700 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 21:21:24 -0700 |
| commit | daf3c7ce2200ce9f0c3c73f1b03039382515d3e3 (patch) | |
| tree | 27903095728ee59f51979089cd83ae884b391292 /include/dt-bindings | |
| parent | aec684ce74f917e7794b7c156fce7ca04b669fe8 (diff) | |
clk: msm: clock-cpu-8996: Increase CBF PLL post-divider to 4 for 8996pro
To open up the frequency range from 150 to 300MHz, change
the fixed CBF PLL post divider from 2 to 4. That way, to
generate frequencies less than 300MHz, the VCO can be run
at 4x with the CBF mux set to use the main output.
While we're here, add the cbf_pll_main clock to the lookup
table.
CRs-Fixed: 980903
Change-Id: I9f70f18e01199c41e1940857afb7bdd477c1c04c
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/msm-clocks-8996.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/msm-clocks-8996.h b/include/dt-bindings/clock/msm-clocks-8996.h index 843437c7e141..82ca331c7057 100644 --- a/include/dt-bindings/clock/msm-clocks-8996.h +++ b/include/dt-bindings/clock/msm-clocks-8996.h @@ -531,6 +531,7 @@ #define clk_perfcl_hf_mux 0x9e8bbe59 #define clk_perfcl_lf_mux 0x2f9c278d #define clk_cbf_pll 0xfe2e96a3 +#define clk_cbf_pll_main 0x2b05cf95 #define clk_cbf_hf_mux 0x71244f73 #define clk_cbf_clk 0x48e9e16b #define clk_xo_ao 0x428c856d |