diff options
| author | Amit Nischal <anischal@codeaurora.org> | 2017-02-17 11:01:06 +0530 |
|---|---|---|
| committer | Amit Nischal <anischal@codeaurora.org> | 2017-02-21 14:39:12 +0530 |
| commit | e9a6b4b935a89db45e771832cbac3544e98ca080 (patch) | |
| tree | 707547a7b53ad1320e5d80cdd7ffaf81a4730c97 /include/dt-bindings | |
| parent | 56b0a1f166107ceae02344ab718b458e1c654662 (diff) | |
clk: qcom: Remove gcc_hmss_ahb_clk for sdm660
The gcc_hmss_ahb_clk will be controlled by RPM. Remove all
control of it from the HLOS clock driver.
Change-Id: I26525787352cb0b85937cc005afba7c37a7989ff
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/qcom,gcc-sdm660.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/include/dt-bindings/clock/qcom,gcc-sdm660.h b/include/dt-bindings/clock/qcom,gcc-sdm660.h index cd5b78e59c5b..b622a662daa8 100644 --- a/include/dt-bindings/clock/qcom,gcc-sdm660.h +++ b/include/dt-bindings/clock/qcom,gcc-sdm660.h @@ -80,7 +80,6 @@ #define GCC_GPU_CFG_AHB_CLK 66 #define GCC_GPU_GPLL0_CLK 67 #define GCC_GPU_GPLL0_DIV_CLK 68 -#define GCC_HMSS_AHB_CLK 70 #define GCC_HMSS_DVM_BUS_CLK 71 #define GCC_HMSS_RBCPR_CLK 72 #define GCC_MMSS_GPLL0_CLK 73 @@ -169,7 +168,6 @@ #define GPLL6_OUT_MAIN 157 #define GPLL6_OUT_TEST 158 #define HLOS1_VOTE_LPASS_ADSP_SMMU_CLK 159 -#define HMSS_AHB_CLK_SRC 160 #define HMSS_GPLL0_CLK_SRC 161 #define HMSS_GPLL4_CLK_SRC 162 #define HMSS_RBCPR_CLK_SRC 163 |