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author | Deepak Katragadda <dkatraga@codeaurora.org> | 2016-02-23 15:21:59 -0800 |
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committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-25 16:02:58 -0700 |
commit | 7947c04641d8dc96eaf84fa9a4c6e1097181abb0 (patch) | |
tree | 8c7d9e8d908ee36507c412cc566192259eee9df9 /include/soc/tegra | |
parent | ffed8c4da397255a8d46b7ba756243cd62391b08 (diff) |
clk: msm: clock-local2: Set RCG root_enable bit prior to changing rate
Firmware running on HW blocks could be powering down the branch
clock or the RCG whilst software is doing frequency changes. If
this happens, the RCG behavior is undefined and may cause issues
with its functioning.
To work around this, use the RCG root_en bit and force turn it on
while scaling the rate. In addition, make the polling timeouts
configurable.
CRs-Fixed: 971305
Change-Id: If2db14c70614c47d673fc735f5f4bac276d4a3d9
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Diffstat (limited to 'include/soc/tegra')
0 files changed, 0 insertions, 0 deletions