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authorHemant Kumar <hemantk@codeaurora.org>2017-01-24 18:13:07 -0800
committerHemant Kumar <hemantk@codeaurora.org>2017-01-26 14:03:10 -0800
commit1eec2157d84dcb872f25da2329abcbe10d6694a7 (patch)
treea78936bcc81e0f5ccf858a46e90809547ff581c3 /lib/fdt_wip.c
parent4f1f60e00d6a434232e6fdc048d072296c24fb45 (diff)
usb: dwc3: Update core clock rate based on USB port speed.
Core clock rate can be reduced or increased based on operating speeds. Controller starts in Super Speed mode (higher core clock rate) and it will operate in super or high or full or low speed upon device connection. Update the core clock rate based on bus speed to allows system to operate in better low power state (such as SVS1/SVS2 based on system configuration). High Speed rate for core clock is programmed from dtsi. Super Speed rate will be used if High speed core clock rate is not provided for backward compatibility. Change-Id: I265149d34de19ab50bd7f106a670a7112bfae384 Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Diffstat (limited to 'lib/fdt_wip.c')
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