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authorKevin Hilman <khilman@linaro.org>2013-05-24 17:24:21 -0700
committerBenoit Cousson <benoit.cousson@linaro.org>2013-06-03 14:55:29 +0200
commit1e68f43b7dcf0e5eee10baeb3cbe4e1ca59db9fd (patch)
tree4a51c5dcc624722ba45ef37d34e9a2acd296fc88 /mm/memory-failure.c
parent00dddcaa51f997cdc6dbae3303a31024e29a0fc0 (diff)
ARM: dts: omap4-panda|sdp: Fix mux for twl6030 IRQ pin and msecure line
Earlier commits ensured proper muxing of pins related to proper TWL6030 behavior: see commit 265a2bc8 (ARM: OMAP3: TWL4030: ensure sys_nirq1 is mux'd and wakeup enabled) and commit 1ef43369 (ARM: OMAP4: TWL: mux sys_drm_msecure as output for PMIC). However these only fixed legacy boot and not DT boot. For DT boot, the default mux values need to be set properly in DT. Special thanks to Nishanth Menon for the review and catching some major flaws in earlier versions. Tested on OMAP4430/Panda and OMAP4460/Panda-ES. Cc: Nishanth Menon <nm@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@linaro.org> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> [benoit.cousson@linaro.org: Slightly change the subject to align board name with file name] Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Diffstat (limited to 'mm/memory-failure.c')
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