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authorFabio Estevam <fabio.estevam@freescale.com>2013-09-05 16:02:57 -0300
committerShawn Guo <shawn.guo@linaro.org>2013-09-17 10:04:24 +0800
commit5d5248a6d110d9ec58c1c1525d338e28357a25c2 (patch)
treefa680617a61643f3d90f5ec557a02f6accdb65b9 /scripts/Lindent
parentbdb1b5f2ddd8a32fd0cd78bb68fc76c30266b27c (diff)
ARM: mach-imx: clk-imx51-imx53: Fix 'spdif1_pred' clock registration
Since commit beb2d1c1ba (ARM i.MX5: Add S/PDIF clocks), the following clock error appears on mx51: TrustZone Interrupt Controller (TZIC) initialized i.MX51 clk 180: register failed with -17 i.MX5 clk 180: register failed with -17 sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956ms CPU identified as i.MX51, silicon rev 3.0 ... Clock 180 corresponds to 'spdif1_podf' and this clock is getting registered twice. Fix it, by properly registering the 'spdif1_pred' clock, which should not reference 'spdif1_podf'. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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