phy: qcom-ufs-qmp-14nm: add hibern8 workaround

Due to missing reset in the UFS PHY logic, the pll may not lock following
analog power collapse. As a result the common block of the PHY must be put
into reset during hibernate entry and taken out of reset during hibernate
exit. SW needs to save ave the calibrated VCO codes after the PHY power up
sequence is completed, saving these codes will save substantial time on
hibernate exit (<50us vs. 1.7ms).

Change-Id: Id5f5eab04f1a1f93179cf9e5cdd3c7c8be4b17af
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>

0 files changed, 0 insertions, 0 deletions