diff options
| -rw-r--r-- | arch/arm64/kernel/perf_event.c | 6 | ||||
| -rw-r--r-- | drivers/soc/qcom/perf_event_kryo.c | 23 | ||||
| -rw-r--r-- | include/linux/perf/arm_pmu.h | 6 |
3 files changed, 27 insertions, 8 deletions
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 2f0fb64dab45..a03c001a19e7 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -85,7 +85,7 @@ enum armv8_a57_perf_types { }; /* PMUv3 HW events mapping. */ -static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = { +const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = { PERF_MAP_ALL_UNSUPPORTED, [PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES, [PERF_COUNT_HW_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED, @@ -116,7 +116,7 @@ static const unsigned armv8_a57_perf_map[PERF_COUNT_HW_MAX] = { [PERF_COUNT_HW_BUS_CYCLES] = ARMV8_PMUV3_PERFCTR_BUS_CYCLES, }; -static const unsigned armv8_pmuv3_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] +const unsigned armv8_pmuv3_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] [PERF_COUNT_HW_CACHE_OP_MAX] [PERF_COUNT_HW_CACHE_RESULT_MAX] = { PERF_CACHE_MAP_ALL_UNSUPPORTED, @@ -631,7 +631,7 @@ static int armv8pmu_probe_num_events(struct arm_pmu *arm_pmu) &arm_pmu->num_events, 1); } -static void armv8_pmu_init(struct arm_pmu *cpu_pmu) +void armv8_pmu_init(struct arm_pmu *cpu_pmu) { cpu_pmu->handle_irq = armv8pmu_handle_irq, cpu_pmu->enable = armv8pmu_enable_event, diff --git a/drivers/soc/qcom/perf_event_kryo.c b/drivers/soc/qcom/perf_event_kryo.c index 4d02fc58ebee..a9a7f3f682be 100644 --- a/drivers/soc/qcom/perf_event_kryo.c +++ b/drivers/soc/qcom/perf_event_kryo.c @@ -205,12 +205,14 @@ static void kryo_clear_resr(struct kryo_evt *evtinfo) kryo_write_pmresr(evtinfo->reg, evtinfo->l_h, val); } -static void kryo_pmu_disable_event(struct hw_perf_event *hwc, int idx) +static void kryo_pmu_disable_event(struct perf_event *event) { unsigned long flags; u32 val = 0; unsigned long ev_num; struct kryo_evt evtinfo; + struct hw_perf_event *hwc = &event->hw; + int idx = hwc->idx; struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); /* Disable counter and interrupt */ @@ -240,12 +242,14 @@ kryo_dis_out: raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } -static void kryo_pmu_enable_event(struct hw_perf_event *hwc, int idx) +static void kryo_pmu_enable_event(struct perf_event *event) { unsigned long flags; u32 val = 0; unsigned long ev_num; struct kryo_evt evtinfo; + struct hw_perf_event *hwc = &event->hw; + int idx = hwc->idx; unsigned long long prev_count = local64_read(&hwc->prev_count); struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); @@ -280,7 +284,7 @@ static void kryo_pmu_enable_event(struct hw_perf_event *hwc, int idx) armv8pmu_enable_intens(idx); /* Restore prev val */ - cpu_pmu->write_counter(idx, prev_count & COUNT_MASK); + cpu_pmu->write_counter(event, prev_count & COUNT_MASK); /* Enable counter */ armv8pmu_enable_counter(idx); @@ -307,6 +311,13 @@ static inline void kryo_init_usermode(void) } #endif +static int kryo_map_event(struct perf_event *event) +{ + return armpmu_map_event(event, &armv8_pmuv3_perf_map, + &armv8_pmuv3_perf_cache_map, + KRYO_EVT_MASK); +} + static void kryo_pmu_reset(void *info) { u32 idx, nb_cnt = cpu_pmu->num_events; @@ -357,16 +368,18 @@ static const struct attribute_group *kryo_pmu_attr_grps[] = { NULL, }; -int kryo_pmu_init(struct arm_pmu *armv8_pmu) +int kryo_pmu_init(struct arm_pmu *kryo_pmu) { pr_info("CPU pmu for kryo-pmuv3 detected\n"); - cpu_pmu = armv8_pmu; + armv8_pmu_init(kryo_pmu); + cpu_pmu = kryo_pmu; cpu_pmu->enable = kryo_pmu_enable_event; cpu_pmu->disable = kryo_pmu_disable_event; cpu_pmu->reset = kryo_pmu_reset; cpu_pmu->pmu.attr_groups = kryo_pmu_attr_grps; + cpu_pmu->map_event = kryo_map_event; cpu_pmu->name = "qcom,kryo-pmuv3"; kryo_clear_resrs(); diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h index dd3ea60948a8..f7bbce527649 100644 --- a/include/linux/perf/arm_pmu.h +++ b/include/linux/perf/arm_pmu.h @@ -111,6 +111,11 @@ struct arm_pmu { #define to_arm_pmu(p) (container_of(p, struct arm_pmu, pmu)) +extern const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX]; +extern const unsigned armv8_pmuv3_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] + [PERF_COUNT_HW_CACHE_OP_MAX] + [PERF_COUNT_HW_CACHE_RESULT_MAX]; + int armpmu_register(struct arm_pmu *armpmu, int type); u64 armpmu_event_update(struct perf_event *event); @@ -149,6 +154,7 @@ int arm_pmu_device_probe(struct platform_device *pdev, const struct of_device_id *of_table, const struct pmu_probe_info *probe_table); +void armv8_pmu_init(struct arm_pmu *cpu_pmu); int armv8pmu_enable_intens(int idx); int armv8pmu_disable_intens(int idx); int armv8pmu_enable_counter(int idx); |