diff options
| -rw-r--r-- | drivers/irqchip/Kconfig | 12 | ||||
| -rw-r--r-- | drivers/irqchip/irq-gic-v3.c | 4 |
2 files changed, 16 insertions, 0 deletions
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 463dbf3dbf6d..ef3e3c9725ee 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -27,6 +27,18 @@ config ARM_GIC_V3_ITS bool select PCI_MSI_IRQ_DOMAIN +config ARM_GIC_V3_NO_ACCESS_CONTROL + bool "GICv3 No Access Control Configuration" + depends on ARM_GIC_V3 + help + On some SOCs with the access control configurations it is + not allowed to access certain set of the GIC registers + from non-secure world. Provide a common flag to protect + those functionalities and compile them out for such + configurations, so that specific registers are not touched. + + For production kernels, you should say 'N' here. + config ARM_NVIC bool select IRQ_DOMAIN diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 1a1d7ce9c90f..6bcf4281422c 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -126,6 +126,7 @@ static u64 __maybe_unused gic_read_iar(void) } #endif +#ifdef CONFIG_ARM_GIC_V3_NO_ACCESS_CONTROL static void gic_enable_redist(bool enable) { void __iomem *rbase; @@ -159,6 +160,9 @@ static void gic_enable_redist(bool enable) pr_err_ratelimited("redistributor failed to %s...\n", enable ? "wakeup" : "sleep"); } +#else +static void gic_enable_redist(bool enable) { } +#endif /* * Routines to disable, enable, EOI and route interrupts |