diff options
17 files changed, 1332 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/media/video/msm-cam-smmu.txt b/Documentation/devicetree/bindings/media/video/msm-cam-smmu.txt new file mode 100644 index 000000000000..b078cb9ab374 --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/msm-cam-smmu.txt @@ -0,0 +1,37 @@ +* Qualcomm Technologies, Inc. MSM Camera SMMU + +[Root level node] +The complete set of context banks for camera are encapsulated under this +root node. Each second level node encapsulates the information related to +the corresponding context bank. During the kernel initialization all +the devices are probed recursively and a device pointer is created for +each context bank keeping track of the virtual address mapping information. + +Required properties: +- compatible : + - "qcom,msm-cam-smmu" + +[Second level nodes] +Required properties: +- compatible : one of: + - "qcom,msm-cam-smmu-cb" + - "qcom,qsmmu-cam-cb" +- iommus : Handle parsed by smmu driver. Number of entries will vary + across targets. +- label - string describing iommu domain usage. + +Optional properties: +- qcom,scratch-buf-support : Enables iommu scratch buffer support in + that context bank. + +Example: + qcom,cam_smmu@0 { + compatible = "qcom,msm-cam-smmu"; + msm_cam_smmu_cb1: msm_cam_smmu_cb1 { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&vfe_iommu 0>; + label = "vfe"; + qcom,scratch-buf-support; + } + } + diff --git a/Documentation/devicetree/bindings/media/video/msm-cam-soc.txt b/Documentation/devicetree/bindings/media/video/msm-cam-soc.txt new file mode 100644 index 000000000000..382395fa5365 --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/msm-cam-soc.txt @@ -0,0 +1,41 @@ +* Qualcomm Technologies, Inc. MSM Camera SOC + +The below set of properties need to be defined by all the camera +modules in their respective dtsi to adapt to SOC layer + +Required properties: + - clock-names: name of the clocks required for the device + - qcom,clock-rates: clock rate in Hz + - 0 if appropriate clock is required but doesn't have to apply the rate + - qcom,vdd-names: names of all the regulators for the device + - Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for + below optional properties: + - qcom,msm-bus,name + - qcom,msm-bus,num-cases + - qcom,msm-bus,num-paths + - qcom,msm-bus,vectors-KBps + - qcom,msm-bus-vector-dyn-vote: indicated dynamic or static voting + - qcom,clock-cntl-support: indicates if further control supported for clocks + - Refer to "Documentation/devicetree/bindings/media/video/msm-ispif.txt" for + below optional property: + - qcom,clock-control + +Example: + + cpp: qcom,cpp@a04000 { + mmagic-vdd-supply = <&gdsc_mmagic_camss>; + camss-vdd-supply = <&gdsc_camss_top>; + vdd-supply = <&gdsc_cpp>; + qcom,vdd-names = "mmagic-vdd", "camss-vdd", "vdd"; + clock-names = "camss_top_ahb_clk", + "ispif_ahb_clk", "csiphy_timer_src_clk", + "csiphy_timer_clk"; + qcom,clock-rates = <0 0 200000000 0>; + qcom,msm-bus,name = "msm_camera_cpp"; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + <106 512 0 0>, + <106 512 0 0>; + qcom,msm-bus-vector-dyn-vote; + }; diff --git a/Documentation/devicetree/bindings/media/video/msm-cam.txt b/Documentation/devicetree/bindings/media/video/msm-cam.txt new file mode 100644 index 000000000000..9763bf8e4051 --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/msm-cam.txt @@ -0,0 +1,15 @@ +* Qualcomm Technologies, Inc. MSM Camera + +Required properties: +- compatible : + - "qcom,msm-cam" +- reg : offset and length of msm camera device registers. +- reg-names : should specify relevant names for each reg property defined. + +Example: + + qcom,msm-cam@fd8c0000 { + compatible = "qcom,msm-cam"; + reg = <0xfd8C0000 0x10000>; + reg-names = "msm-cam"; + }; diff --git a/Documentation/devicetree/bindings/media/video/msm-camera-flash.txt b/Documentation/devicetree/bindings/media/video/msm-camera-flash.txt new file mode 100644 index 000000000000..f4885d5d9392 --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/msm-camera-flash.txt @@ -0,0 +1,72 @@ +* Qualcomm Technologies, Inc. MSM CAMERA FLASH + +Required properties: +- cell-index : Should contain flash source index to diffentiate + between different flash devices. These indexes represent flash devices + for multiple flashes. + - 0, 1, 2, 3 +- compatible : + - "qcom,camera-led-flash" + - "qcom,camera-flash" + - "qcom,led-flash" + - "qcom,led-flash1" +- qcom,flash-type : Should contain type flash device + - 1 for LED flash + - 2 for strobe flash + - 3 for simple led flash controlled by one gpio + This is a low cost led used for camera flash, the led is driven by + system power, and use a transistor controlled by external pin to + gate its on/off state. +- qcom,flash-source : Should contain array of phandles to flash source nodes. + - pm8941_flash0 pm8941_flash1 + +Optional properties: +-qcom,torch-source : Should contain phandle to torch source node. + -pm8941_torch +- qcom,slave-id : should contain i2c slave address, device id address + and expected id read value. +- qcom,max-current: Max current in mA supported by flash +- qcom,max-duration: Max duration in milliseconds the flash can glow. +-qcom,switch-source : Should contain phandle to switch source node. + This is used to trigger dual led at same time to avoid sync issues. +- qcom,cci-master : should contain i2c master id to be used for this flash. + - 0 -> MASTER 0 + - 1 -> MASTER 1 +- reg : offset and length of the register set for the device. + for the flash operating in compatible mode. +- gpios : should contain phandle to gpio controller node and array of + #gpio-cells specifying specific gpio (controller specific) +- qcom,gpio-req-tbl-num : should contain index to gpios specific to this flash +- qcom,gpio-req-tbl-flags : should contain direction of gpios present in + qcom,gpio-req-tbl-num property (in the same order) +- qcom,gpio-req-tbl-label : should contain name of gpios present in + qcom,gpio-req-tbl-num property (in the same order) +- qcom,gpio-flash-reset : should contain index to gpio used by flash's "flash reset" pin. +- qcom,gpio-flash-en : should contain index to gpio used by flash's "flash enable" pin. +- qcom,gpio-flash-now : should contain index to gpio used by flash's "flash now" pin. +- label : should contain unique flash name to differentiate from other flash + - "adp1660" + - "bd7710" +Example: + +qcom,led-flash@60 { + reg = <0x60>; + cell-index = <0>; + qcom,slave-id = <0x60 0x00 0x0011>; + compatible = "qcom,led-flash"; + label = "adp1660"; + qcom,flash-type = <1>; + qcom,cci-master = <0>; + gpios = <&msmgpio 23 0>, + <&msmgpio 24 0>; + <&msmgpio 25 0>; + qcom,gpio-flash-reset = <0>; + qcom,gpio-flash-en = <0>; + qcom,gpio-flash-now = <1>; + qcom,gpio-req-tbl-num = <0 1>; + qcom,gpio-req-tbl-flags = <0 0>; + qcom,gpio-req-tbl-label = "FLASH_EN", + "FLASH_NOW"; + qcom,max-current = <750>; + qcom,max-duration = <1600>; + }; diff --git a/Documentation/devicetree/bindings/media/video/msm-cci.txt b/Documentation/devicetree/bindings/media/video/msm-cci.txt new file mode 100644 index 000000000000..086af9b337f4 --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/msm-cci.txt @@ -0,0 +1,364 @@ +* Qualcomm Technologies, Inc. MSM CCI + +[First level nodes] +Required properties: +- cell-index: cci hardware core index +- compatible : + - "qcom,cci" +- reg : offset and length of the register set for the device + for the cci operating in compatible mode. +- reg-names : should specify relevant names to each reg property defined. +- interrupts : should contain the cci interrupt. +- interrupt-names : should specify relevant names to each interrupts + property defined. +- gpios : should contain phandle to gpio controller node and array of + #gpio-cells specifying specific gpio (controller specific) +- qcom,gpio-req-tbl-num : should contain index to gpios specific to this sensor +- qcom,gpio-req-tbl-flags : should contain direction of gpios present in + qcom,gpio-req-tbl-num property (in the same order) +- qcom,gpio-req-tbl-label : should contain name of gpios present in + qcom,gpio-req-tbl-num property (in the same order) +- clock-names: name of the clocks required for the device +- clock-rates: clock rate in Hz + +Optional properties: +- qcom,cam-vreg-name : name of the voltage regulators required for the device. +- gdscr-supply : should contain gdsr regulator used for cci clocks. +- mmagic-supply : should contain mmagic regulator used for mmagic clocks. + +- I2c speed settings (*) + - i2c_freq_100Khz: qcom,i2c_standard_mode - node should contain clock settings for + 100Khz + - i2c_freq_400Khz: qcom,i2c_fast_mode - node should contain clock settings for + 400Khz + - i2c_freq_custom: qcom,i2c_custom_mode - node can contain clock settings for + frequencies other than 100Khz and 400Khz which is specific to usecase. + Currently it has settings for 375Khz. + - i2c_freq_1Mhz: qcom,i2c_fast_plus_mode - node should contain clock + settings for 1Mhz + * if speed settings is not defined the low level driver can use "i2c_freq_custom" + like default + +[Second level nodes] +* Qualcomm Technologies, Inc. CCI clock settings + +Optional properties: +- qcom,hw-thigh : should contain high period of the SCL clock in terms of CCI + clock cycle +- qcom,hw-tlow : should contain high period of the SCL clock in terms of CCI + clock cycle +- qcom,hw-tsu-sto : should contain setup time for STOP condition +- qcom,hw-tsu-sta : should contain setup time for Repeated START condition +- qcom,hw-thd-dat : should contain hold time for the data +- qcom,hw-thd-sta : should contain hold time for START condition +- qcom,hw-tbuf : should contain free time between a STOP and a START condition +- qcom,hw-scl-stretch-en : should contain enable or disable clock stretching +- qcom,hw-trdhld : should contain internal hold time for SDA +- qcom,hw-tsp : should contain filtering of glitches + +* Qualcomm Technologies, Inc. MSM Sensor + +MSM sensor node contains properties of camera sensor + +Required properties: +- compatible : should be manufacturer name followed by sensor name + - "qcom,camera" + - "shinetech,gc0310" +- reg : should contain i2c slave address of the device +- qcom,csiphy-sd-index : should contain csiphy instance that will used to + receive sensor data + - 0, 1, 2 +- qcom,csid-sd-index : should contain csid core instance that will used to + receive sensor data + - 0, 1, 2, 3 +- cam_vdig-supply : should contain regulator from which digital voltage is + supplied +- cam_vana-supply : should contain regulator from which analog voltage is + supplied +- cam_vio-supply : should contain regulator from which IO voltage is supplied +- qcom,cam-vreg-name : should contain names of all regulators needed by this + sensor + - "cam_vdig", "cam_vana", "cam_vio", "cam_vaf" +- qcom,cam-vreg-min-voltage : should contain minimum voltage level for + regulators mentioned in qcom,cam-vreg-name property (in the same order) +- qcom,cam-vreg-max-voltage : should contain maximum voltage level for + regulators mentioned in qcom,cam-vreg-name property (in the same order) +- qcom,cam-vreg-op-mode : should contain optimum voltage level for regulators + mentioned in qcom,cam-vreg-name property (in the same order) + +Optional properties: +- qcom,slave-id : should contain i2c slave address, device id address + ,expected id read value and device id mask +- qcom,sensor-name : should contain unique sensor name to differentiate from + other sensor + - "s5k3l1yx" +- qcom,sensor-mode : should contain sensor mode supported + - 0 -> back camera 2D + - 1 -> front camera 2D + - 2 -> back camera 3D + - 3 -> back camera int 3D +- qcom,sensor-type : should contain format of data that sensor streams + - 0 -> bayer format + - 1 -> yuv format +- qcom,is-vpe : should be enabled if VPE module is required for post processing + of this sensor + - 1 if required, 0 otherwise +- qcom,mount-angle : should contain the physical mount angle of the sensor on + the target + - 0, 90, 180, 360 +- qcom,mclk-23880000 : should be enabled if the supported mclk is 23.88Mhz and + not 24 Mhz. +- qcom,gpio-no-mux : should contain field to indicate whether gpio mux table is + available + - 1 if gpio mux is not available, 0 otherwise +- cam_vaf-supply : should contain regulator from which AF voltage is supplied +- gpios : should contain phandle to gpio controller node and array of + #gpio-cells specifying specific gpio (controller specific) +- qcom,gpio-reset : should contain index to gpio used by sensors reset_n +- qcom,gpio-standby : should contain index to gpio used by sensors standby_n +- qcom,gpio-vio : should contain index to gpio used by sensors io vreg enable +- qcom,gpio-vana : should contain index to gpio used by sensors analog vreg enable +- qcom,gpio-vdig : should contain index to gpio used by sensors digital vreg enable +- qcom,gpio-vaf : should contain index to gpio used by sensors af vreg enable +- qcom,gpio-af-pwdm : should contain index to gpio used by sensors af pwdm_n +- qcom,gpio-req-tbl-num : should contain index to gpios specific to this sensor +- qcom,gpio-req-tbl-flags : should contain direction of gpios present in + qcom,gpio-req-tbl-num property (in the same order) +- qcom,gpio-req-tbl-label : should contain name of gpios present in + qcom,gpio-req-tbl-num property (in the same order) +- qcom,gpio-set-tbl-num : should contain index of gpios that need to be + configured by msm +- qcom,gpio-set-tbl-flags : should contain value to be configured for the gpios + present in qcom,gpio-set-tbl-num property (in the same order) +- qcom,gpio-set-tbl-delay : should contain amount of delay after configuring + gpios as specified in gpio_set_tbl_flags property (in the same order) +- qcom,csi-lane-assign : should contain lane assignment value to map CSIPHY + lanes to CSID lanes + - 0x4320 +- qcom,csi-lane-mask : should contain lane mask that specifies CSIPHY lanes to + be enabled +- qcom,csi-phy-sel : should contain CSIPHY core instance from which CSID should + receive data +- qcom,actuator-cam-name : should contain actuator cam name associated with + this sensor + - If actuator does not exist, this property should not be initialized + - If actuator exist, this field should indicate the index of actuator to + be used +- qcom,actuator-vcm-pwd : should contain the gpio pin of vcm power to be enabled + for actuator +- qcom,actuator-vcm-enable : should contain value to be set for actuator vcm + gpio +- qcom,sensor-position : should contain the mount angle of the camera sensor + - 0 -> back camera + - 1 -> front camera +- qcom,cci-master : should contain i2c master id to be used for this camera + sensor + - 0 -> MASTER 0 + - 1 -> MASTER 1 +- qcom,actuator-src : if auto focus is supported by this sensor, this + property should contain phandle of respective actuator node +- qcom,led-flash-src : if LED flash is supported by this sensor, this + property should contain phandle of respective LED flash node +- qcom,vdd-cx-supply : should contain regulator from which cx voltage is + supplied +- qcom,vdd-cx-name : should contain names of cx regulator +- qcom,eeprom-src : if eeprom memory is supported by this sensor, this + property should contain phandle of respective eeprom nodes +- qcom,ois-src : if optical image stabilization is supported by this sensor, + this property should contain phandle of respective ois node + +* Qualcomm Technologies, Inc. MSM ACTUATOR + +Required properties: +- cell-index : should contain unique identifier to differentiate + between multiple actuators +- reg : should contain i2c slave address of the actuator and length of + data field which is 0x0 +- compatible : + - "qcom,actuator" +- qcom,cci-master : should contain i2c master id to be used for this camera + sensor + - 0 -> MASTER 0 + - 1 -> MASTER 1 + +Optional properties: +- qcom,cam-vreg-name : should contain names of all regulators needed by this + actuator + - "cam_vaf" +- qcom,cam-vreg-min-voltage : should contain minimum voltage level in mcrovolts + for regulators mentioned in qcom,cam-vreg-name property (in the same order) +- qcom,cam-vreg-max-voltage : should contain maximum voltage level in mcrovolts + for regulators mentioned in qcom,cam-vreg-name property (in the same order) +- qcom,cam-vreg-op-mode : should contain the maximum current in microamps + required from the regulators mentioned in the qcom,cam-vreg-name property + (in the same order). +- cam_vaf-supply : should contain regulator from which AF voltage is supplied + +* Qualcomm Technologies, Inc. MSM OIS + +Required properties: +- cell-index : should contain unique identifier to differentiate + between multiple ois drivers +- reg : should contain i2c slave address of the ois and length of + data field which is 0x0 +- compatible : + - "qcom,ois" +- qcom,cci-master : should contain i2c master id to be used for this camera + sensor + - 0 -> MASTER 0 + - 1 -> MASTER 1 + +Optional properties: +- qcom,cam-vreg-name : should contain names of all regulators needed by this + ois + - "cam_vaf" +- qcom,cam-vreg-min-voltage : should contain minimum voltage level in mcrovolts + for regulators mentioned in qcom,cam-vreg-name property (in the same order) +- qcom,cam-vreg-max-voltage : should contain maximum voltage level in mcrovolts + for regulators mentioned in qcom,cam-vreg-name property (in the same order) +- qcom,cam-vreg-op-mode : should contain the maximum current in microamps + required from the regulators mentioned in the qcom,cam-vreg-name property + (in the same order). +- cam_vaf-supply : should contain regulator from which ois voltage is supplied + +Example: + + qcom,cci@0xfda0c000 { + cell-index = <0>; + compatible = "qcom,cci"; + reg = <0xfda0c000 0x300>; + reg-names = "cci"; + interrupts = <0 50 0>; + interrupt-names = "cci"; + clock-names = "camss_top_ahb_clk", "vfe_clk_src", + "camss_vfe_vfe_clk", "iface_clk", "cpp_core_clk", + "cpp_iface_clk", "cpp_bus_clk", "micro_iface_clk"; + qcom,clock-rates = <0 266670000 0 0 266670000 0 0 0>; + gpios = <&msmgpio 19 0>, + <&msmgpio 20 0>, + <&msmgpio 21 0>, + <&msmgpio 22 0>; + qcom,gpio-tbl-num = <0 1 2 3>; + qcom,gpio-tbl-flags = <1 1 1 1>; + qcom,gpio-tbl-label = "CCI_I2C_DATA0", + "CCI_I2C_CLK0", + "CCI_I2C_DATA1", + "CCI_I2C_CLK1"; + i2c_freq_100Khz: qcom,i2c_standard_mode { + status = "disabled"; + }; + i2c_freq_400Khz: qcom,i2c_fast_mode { + status = "disabled"; + }; + i2c_freq_custom: qcom,i2c_custom_mode { + status = "disabled"; + }; + + actuator0: qcom,actuator@18 { + cell-index = <0>; + reg = <0x18>; + compatible = "qcom,actuator"; + qcom,cci-master = <0>; + cam_vaf-supply = <&pm8941_l23>; + qcom,cam-vreg-name = "cam_vaf"; + qcom,cam-vreg-min-voltage = <3000000>; + qcom,cam-vreg-max-voltage = <3000000>; + qcom,cam-vreg-op-mode = <100000>; + }; + + qcom,camera@0 { + cell-index = <0>; + compatible = "qcom,camera"; + reg = <0x0>; + qcom,csiphy-sd-index = <0>; + qcom,csid-sd-index = <0>; + qcom,mount-angle = <90>; + qcom,led-flash-src = <&led_flash0>; + qcom,actuator-src = <&actuator0>; + qcom,eeprom-src = <&eeprom0>; + cam_vdig-supply = <&pm8994_s3>; + cam_vio-supply = <&pm8994_lvs1>; + cam_vana-supply = <&pm8994_l17>; + qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; + qcom,cam-vreg-min-voltage = <1300000 0 2500000>; + qcom,cam-vreg-max-voltage = <1300000 0 2500000>; + qcom,cam-vreg-op-mode = <105000 0 80000>; + qcom,gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active &cam_sensor_rear_active>; + pinctrl-1 = <&cam_sensor_mclk0_suspend &cam_sensor_rear_suspend>; + gpios = <&tlmm 13 0>, + <&tlmm 30 0>, + <&tlmm 29 0>; + qcom,gpio-reset = <1>; + qcom,gpio-standby = <2>; + qcom,gpio-req-tbl-num = <0 1 2>; + qcom,gpio-req-tbl-flags = <1 0 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0", + "CAM_STANDBY0"; + qcom,sensor-position = <0>; + qcom,sensor-mode = <0>; + qcom,cci-master = <0>; + status = "ok"; + clocks = <&clock_mmss clk_mclk0_clk_src>, + <&clock_mmss clk_camss_mclk0_clk>; + clock-names = "cam_src_clk", "cam_clk"; + }; + +&i2c_freq_100Khz { + qcom,hw-thigh = <78>; + qcom,hw-tlow = <114>; + qcom,hw-tsu-sto = <28>; + qcom,hw-tsu-sta = <28>; + qcom,hw-thd-dat = <10>; + qcom,hw-thd-sta = <77>; + qcom,hw-tbuf = <118>; + qcom,hw-scl-stretch-en = <0>; + qcom,hw-trdhld = <6>; + qcom,hw-tsp = <1>; + status = "ok"; +}; + +&i2c_freq_400Khz { + qcom,hw-thigh = <20>; + qcom,hw-tlow = <28>; + qcom,hw-tsu-sto = <21>; + qcom,hw-tsu-sta = <21>; + qcom,hw-thd-dat = <13>; + qcom,hw-thd-sta = <18>; + qcom,hw-tbuf = <25>; + qcom,hw-scl-stretch-en = <0>; + qcom,hw-trdhld = <6>; + qcom,hw-tsp = <3>; + status = "ok"; +}; + +&i2c_freq_custom { + qcom,hw-thigh = <15>; + qcom,hw-tlow = <28>; + qcom,hw-tsu-sto = <21>; + qcom,hw-tsu-sta = <21>; + qcom,hw-thd-dat = <13>; + qcom,hw-thd-sta = <18>; + qcom,hw-tbuf = <25>; + qcom,hw-scl-stretch-en = <1>; + qcom,hw-trdhld = <6>; + qcom,hw-tsp = <3>; + status = "ok"; +}; + +&i2c_freq_1Mhz { + qcom,hw-thigh = <16>; + qcom,hw-tlow = <22>; + qcom,hw-tsu-sto = <17>; + qcom,hw-tsu-sta = <18>; + qcom,hw-thd-dat = <16>; + qcom,hw-thd-sta = <15>; + qcom,hw-tbuf = <19>; + qcom,hw-scl-stretch-en = <1>; + qcom,hw-trdhld = <3>; + qcom,hw-tsp = <3>; + qcom,cci-clk-src = <37500000>; + status = "ok"; +}; diff --git a/Documentation/devicetree/bindings/media/video/msm-cpp.txt b/Documentation/devicetree/bindings/media/video/msm-cpp.txt new file mode 100644 index 000000000000..b39c20ecbf22 --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/msm-cpp.txt @@ -0,0 +1,125 @@ +* Qualcomm Technologies, Inc. MSM CPP + +Required properties: +- cell-index: cpp hardware core index +- compatible : + - "qcom,cpp" +- reg : offset and length of the register set for the device + for the cpp operating in compatible mode. +- reg-names : should specify relevant names to each reg property defined. + - cpp - has CPP MICRO register set. + - cpp_vbif - has VBIF core register set used by CPP. + - cpp_hw - has CPP hardware register set. +- interrupts : should contain the cpp interrupt. +- interrupt-names : should specify relevant names to each interrupts + property defined. +- vdd-supply: phandle to GDSC regulator controlling VFE & CPP core. +- clocks: list of phandles to the clock controller device and coresponding + clock names. +- clock-names: name of the clocks required for the device used by the consumer. +- qcom,clock-rates: clock rate in Hz. +- qcom,min-clock-rate: minimum clock rate in Hz, to be set to CPP hardware in + case dynamic clock scaling based on prevalent streams need lower clock rate. +- qcom,cpp-fw-payload-info: Child node for cpp node having infomration on + cpp firmware payload offsets. This is mandatory node. + +Required properties of the child node: +- qcom,stripe-base = Base offset of stripes in cpp payload. +- qcom,plane-base = Base offset of planes in cpp payload. +- qcom,stripe-size = size of each stripe in payload. +- qcom,plane-size = size of each plane in payload. +- qcom,fe-ptr-off = offset from stripe base to fetch engine address + location in payload. +- qcom,we-ptr-off = offset from stripe base to write engine address + location in payload. + +Optional properties of the child node: +- qcom,ref-fe-ptr-off = offset from stripe base to reference fetch engine + address location in payload. +- qcom,ref-we-ptr-off = offset from stripe base to reference write engine + address location in payload. +- qcom,we-meta-ptr-off = offset from stripe base to metadata address + location in payload. +- qcom,fe-mmu-pf-ptr-off = offset from plane base to fetch engine mmu prefetch + address min location in payload. +- qcom,ref-fe-mmu-pf-ptr-off = offset from plane base to reference fetch engine + mmu prefetch address min location in payload. +- qcom,we-mmu-pf-ptr-off = offset from plane base to write engine mmu prefetch + address min location in payload. +- qcom,dup-we-mmu-pf-ptr-off = offset from plane base to duplicate write engine + mmu prefetch address min location in payload. +- qcom,ref-we-mmu-pf-ptr-off = offset from plane base to reference write engine + mmu prefetch address min location in payload. +- qcom,set-group-buffer-len = length/size of set group buffer command used for + hfr. +- qcom,dup-frame-indicator-off = offset for duplicate frame indicator in a + batch for frames + +Optional properties: +- mmagic-vdd-supply: phandle to GDSC regulator controlling mmagic. +- camss-vdd-supply: phandle to GDSC regulator controlling camss. +- qcom,bus-master: Flag for presence of CPP bus master. It has to be set only for + platforms that support such feature. +- qcom,vbif-setting: The offset and value for vbif core qos registers. + The first entry is register offset and second entry is register value. + +Example: + + qcom,cpp@fda04000 { + cell-index = <0>; + compatible = "qcom,cpp"; + reg = <0xfda04000 0x100>, + <0xfda80000 0x200>, + <0xfda18000 0x008>, + <0xfd8c36D4 0x4>; + reg-names = "cpp", "cpp_vbif", "cpp_hw", "camss_cpp"; + interrupts = <0 49 0>; + interrupt-names = "cpp"; + mmagic-vdd-supply = <&gdsc_mmagic_camss>; + camss-vdd-supply = <&gdsc_camss_top>; + vdd-supply = <&gdsc_cpp>; + clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>, + <&clock_gcc clk_mmssnoc_axi_clk>, + <&clock_mmss clk_mmagic_camss_axi_clk>, + <&clock_mmss clk_camss_top_ahb_clk>, + <&clock_mmss clk_cpp_clk_src>, + <&clock_mmss clk_camss_cpp_ahb_clk>, + <&clock_mmss clk_camss_cpp_axi_clk>, + <&clock_mmss clk_camss_cpp_clk>, + <&clock_mmss clk_camss_micro_ahb_clk>, + <&clock_mmss clk_camss_ahb_clk>; + <&clock_mmss clk_smmu_cpp_axi_clk>, + <&clock_mmss clk_camss_cpp_vbif_ahb_clk>, + clock-names = "mmss_mmagic_ahb_clk", "mmssnoc_axi_clk", + "mmagic_camss_axi_clk", "camss_top_ahb_clk", + "cpp_core_clk", "camss_cpp_ahb_clk", + "camss_cpp_axi_clk", "camss_cpp_clk", + "micro_iface_clk", "camss_ahb_clk"; + "smmu_cpp_axi_clk", "cpp_vbif_ahb_clk"; + qcom,clock-rates = <0 0 0 0 465000000 0 0 465000000 0 0 0 0>; + qcom,min-clock-rate = <320000000>; + qcom,bus-master = <1>; + qcom,vbif-qos-setting = <0x20 0x10000000>, + <0x24 0x10000000>, + <0x28 0x10000000>, + <0x2C 0x10000000>; + qcom,cpp-fw-payload-info { + qcom,stripe-base = <553>; + qcom,plane-base = <481>; + qcom,stripe-size = <61>; + qcom,plane-size = <24>; + qcom,fe-ptr-off = <11>; + qcom,we-ptr-off = <23>; + qcom,ref-fe-ptr-off = <17>; + qcom,ref-we-ptr-off = <36>; + qcom,we-meta-ptr-off = <42>; + qcom,fe-mmu-pf-ptr-off = <6>; + qcom,ref-fe-mmu-pf-ptr-off = <9>; + qcom,we-mmu-pf-ptr-off = <12>; + qcom,dup-we-mmu-pf-ptr-off = <17>; + qcom,ref-we-mmu-pf-ptr-off = <22>; + qcom,set-group-buffer-len = <135>; + qcom,dup-frame-indicator-off = <70>; + + }; + }; diff --git a/Documentation/devicetree/bindings/media/video/msm-csi-phy.txt b/Documentation/devicetree/bindings/media/video/msm-csi-phy.txt new file mode 100644 index 000000000000..66e74bb7c5c2 --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/msm-csi-phy.txt @@ -0,0 +1,38 @@ +* Qualcomm Technologies, Inc. MSM CSI Phy + +Required properties: +- cell-index: csi phy hardware core index +- compatible : + - "qcom,csiphy" + - "qcom,csiphy-v2.0" + - "qcom,csiphy-v2.2" + - "qcom,csiphy-v3.0" + - "qcom,csiphy-v3.1" + - "qcom,csiphy-v3.1.1" + - "qcom,csiphy-v3.2" + - "qcom,csiphy-v3.4.2" + - "qcom,csiphy-v3.5" +- reg : offset and length of the register set for the device + for the csiphy operating in compatible mode. +- reg-names : should specify relevant names to each reg property defined. +- interrupts : should contain the csiphy interrupt. +- interrupt-names : should specify relevant names to each interrupts + property defined. +- clock-names: name of the clocks required for the device +- qcom,clock-rates: clock rate in Hz + - 0 if appropriate clock is required but doesn't have to apply the rate + +Example: + + qcom,csiphy@fda0ac00 { + cell-index = <0>; + compatible = "qcom,csiphy-v2.0", "qcom,csiphy"; + reg = <0xfda0ac00 0x200>; + reg-names = "csiphy"; + interrupts = <0 78 0>; + interrupt-names = "csiphy"; + clock-names = "camss_top_ahb_clk", + "ispif_ahb_clk", "csiphy_timer_src_clk", + "csiphy_timer_clk"; + qcom,clock-rates = <0 0 200000000 0>; + }; diff --git a/Documentation/devicetree/bindings/media/video/msm-csid.txt b/Documentation/devicetree/bindings/media/video/msm-csid.txt new file mode 100644 index 000000000000..5da0f02867ab --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/msm-csid.txt @@ -0,0 +1,51 @@ +* Qualcomm Technologies, Inc. MSM CSID + +Required properties: +- cell-index: csid hardware core index +- compatible : + - "qcom,csid" + - "qcom,csid-v2.0" + - "qcom,csid-v2.2" + - "qcom,csid-v3.0" + - "qcom,csid-v3.1" + - "qcom,csid-v3.2" + - "qcom,csid-v3.5" + - "qcom,csid-v4.0" + - "qcom,csid-v3.4.2" + - "qcom,csid-v3.5.1" + - "qcom,csid-v3.4.3" +- reg : offset and length of the register set for the device + for the csid operating in compatible mode. +- reg-names : should specify relevant names to each reg property defined. +- interrupts : should contain the csid interrupt. +- interrupt-names : should specify relevant names to each interrupts + property defined. +- qcom,csi-vdd-voltage : should specify voltage level + for mipi csi in uV. +- qcom,mipi-csi-vdd-supply : should contain regulator to be used for + this csid core +- clock-names: name of the clocks required for the device +- qcom,clock-rates: clock rate in Hz + - 0 if appropriate clock is required but doesn't have to apply the rate + +Optional properties: +- qcom,cam-vreg-name : name of the voltage regulators required for the device. +- gdscr-supply : should contain regulator used for csid clocks. +- mmagic-supply : should contain mmagic regulator used for mmagic clocks. + +Example: + + qcom,csid@fda08000 { + cell-index = <0>; + compatible = "qcom,csid-v2.0", "qcom,csid"; + reg = <0xfda08000 0x200>; + reg-names = "csid"; + interrupts = <0 51 0>; + interrupt-names = "csiphy"; + qcom,csi-vdd-voltage = <1800000>; + qcom,mipi-csi-vdd-supply = <&pm8941_l12>; + clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", + "csi_ahb_clk", "csi_src_clk", "csi_clk", + "csi_phy_clk", "csi_pix_clk", "csi_rdi_clk"; + qcom,clock-rates = <0 0 0 200000000 0 0 0 0>; + }; diff --git a/Documentation/devicetree/bindings/media/video/msm-eeprom.txt b/Documentation/devicetree/bindings/media/video/msm-eeprom.txt new file mode 100644 index 000000000000..f951b2167012 --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/msm-eeprom.txt @@ -0,0 +1,199 @@ +* Qualcomm Technologies, Inc. MSM EEPROM + +EEPROM is an one time programmed(OTP) device that stores the calibration data +use for camera sensor. It may either be integrated in the sensor module or in +the sensor itself. As a result, the power, clock and GPIOs may be the same as +the camera sensor. The following describes the page block map, power supply, +clock, GPIO and power on sequence properties of the EEPROM device. + +Required properties if probe happens from camera daemon: +- cell-index: eeprom hardware core index +- compatible : + - "qcom,eeprom" +- reg : offset of eeprom device registers. +- qcom,cci-master : should specify the cci core index that eeprom use. +- cam_vio-supply : should contain regulator to be used for the IO vdd. +- qcom,cam-vreg-name : should specify the regulator name to be used for + this eeprom. +- qcom,cam-vreg-type : should specify the regulator type to be used for + this eeprom. +- qcom,cam-vreg-min-voltage : should specify minimum voltage level + for eeprom in uV. +- qcom,cam-vreg-max-voltage : should specify maximum voltage level + for eeprom in uV. +- qcom,cam-vreg-op-mode : should specify current level for eeprom in uA. +- qcom,gpio-no-mux : should specify the gpio mux type. +- gpios : should specify the gpios to be used for the eeprom. +- qcom,gpio-reset : should specify the reset gpio index. +- qcom,gpio-standby : should specify the standby gpio index. +- qcom,gpio-req-tbl-num : should specify the gpio table index. +- qcom,gpio-req-tbl-flags : should specify the gpio functions. +- qcom,gpio-req-tbl-label : should specify the gpio labels. +- qcom,cam-power-seq-type : should specify the power on sequence types. +- qcom,cam-power-seq-val : should specify the power on sequence values. +- qcom,cam-power-seq-cfg-val : should specify the power on sequence config + values. +- qcom,cam-power-seq-delay : should specify the power on sequence delay + time in ms. + +Optional properties: +- cam_vdig-supply : should contain regulator to be used for the digital vdd. + + + +Example: + + eeprom0: qcom,eeprom@60 { + cell-index = <0>; + reg = <0x60 0x0>; + compatible = "qcom,eeprom"; + qcom,cci-master = <0>; + cam_vdig-supply = <&pm8226_l5>; + cam_vio-supply = <&pm8226_lvs1>; + qcom,cam-vreg-name = "cam_vdig", "cam_vio"; + qcom,cam-vreg-type = <0 1>; + qcom,cam-vreg-min-voltage = <1200000 0>; + qcom,cam-vreg-max-voltage = <1200000 0>; + qcom,cam-vreg-op-mode = <200000 0>; + qcom,gpio-no-mux = <0>; + gpios = <&msmgpio 26 0>, + <&msmgpio 37 0>, + <&msmgpio 36 0>; + qcom,gpio-reset = <1>; + qcom,gpio-standby = <2>; + qcom,gpio-req-tbl-num = <0 1 2>; + qcom,gpio-req-tbl-flags = <1 0 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK", + "CAM_RESET1", + "CAM_STANDBY"; + qcom,cam-power-seq-type = "sensor_vreg", + "sensor_vreg", "sensor_clk", + "sensor_gpio", "sensor_gpio"; + qcom,cam-power-seq-val = "cam_vdig", + "cam_vio", "sensor_cam_mclk", + "sensor_gpio_reset", + "sensor_gpio_standby"; + qcom,cam-power-seq-cfg-val = <1 1 24000000 1 1>; + qcom,cam-power-seq-delay = <1 1 5 5 10>; + }; + + + +Required properties if eeprom probe is kernel probe: +- cell-index: eeprom hardware core index +- compatible : + - "qcom,eeprom" +- reg : offset of eeprom device registers. +- qcom,eeprom-name : should specify relevant names of the eeprom module + library. +- qcom,slave-addr : should specify the slave address of the eeprom. +- qcom,cci-master : should specify the cci core index that eeprom use. +- qcom,num-blocks : should specify the total block number that eeprom contains, + every block should contains page poll and mem. +- qcom,page%d : number %d page size, start address, address type, data, + data type, delay in ms. size 0 stand for non-paged. + - address type : 1 byte, 2 word. + - data type : 1 byte, 2 word. +- qcom,poll%d : number %d poll size, poll reg address, address type, data, + data type, delay in ms. size 0 stand for not used. + - address type : 1 byte, 2 word. + - data type : 1 byte, 2 word. +- qcom,mem%d : number %d memory size, start address, address type, data, + data type, delay in ms. size 0 stand for not used. + - address type : 1 byte, 2 word. + - data type : 1 byte, 2 word. +- cam_vio-supply : should contain regulator to be used for the IO vdd. +- qcom,cam-vreg-name : should specify the regulator name to be used for + this eeprom. +- qcom,cam-vreg-type : should specify the regulator type to be used for + this eeprom. +- qcom,cam-vreg-min-voltage : should specify minimum voltage level + for eeprom in uV. +- qcom,cam-vreg-max-voltage : should specify maximum voltage level + for eeprom in uV. +- qcom,cam-vreg-op-mode : should specify current level for eeprom in uA. +- pinctrl-names : should specify the pin control groups followed by + the definition of each group +- qcom,gpio-no-mux : should specify the gpio mux type. +- gpios : should specify the gpios to be used for the eeprom. +- qcom,gpio-reset : should specify the reset gpio index. +- qcom,gpio-standby : should specify the standby gpio index. +- qcom,gpio-req-tbl-num : should specify the gpio table index. +- qcom,gpio-req-tbl-flags : should specify the gpio functions. +- qcom,gpio-req-tbl-label : should specify the gpio labels. +- qcom,cam-power-seq-type : should specify the power on sequence types. +- qcom,cam-power-seq-val : should specify the power on sequence values. +- qcom,cam-power-seq-cfg-val : should specify the power on sequence config + values. +- qcom,cam-power-seq-delay : should specify the power on sequence delay + time in ms. + +Optional properties: +- qcom,pageen%d : number %d page enable reg size, start address, address type, + data, data type, delay in ms. size 0 stand for not used. +- cam_vdig-supply : should contain regulator to be used for the digital vdd. +- qcom,saddr%d : property should specify the slave address for block (%d). +- qcom,i2c-freq-mode : property should specify the I2C speed mode. + +Optional properties -EEPROM Camera Multimodule +- qcom,cmm-data-support - Camera MultiModule data capability flag. +- qcom,cmm-data-compressed - Camera MultiModule data compression flag. +- qcom,cmm-data-offset - Camera MultiModule data start offset. +- qcom,cmm-data-size - Camera MultiModule data size. + + + +Example: + + eeprom0: qcom,eeprom@60 { + cell-index = <0>; + reg = <0x60 0x0>; + qcom,eeprom-name = "msm_eeprom"; + compatible = "qcom,eeprom"; + qcom,slave-addr = <0x60>; + qcom,cci-master = <0>; + qcom,num-blocks = <2>; + qcom,page0 = <1 0x0100 2 0x01 1 1>; + qcom,poll0 = <0 0x0 2 0 1 1>; + qcom,mem0 = <0 0x0 2 0 1 0>; + qcom,page1 = <1 0x0200 2 0x8 1 1>; + qcom,pageen1 = <1 0x0202 2 0x01 1 10>; + qcom,poll1 = <0 0x0 2 0 1 1>; + qcom,mem1 = <32 0x3000 2 0 1 0>; + qcom,saddr1 = <0x62>; + + qcom,cmm-data-support; + qcom,cmm-data-compressed; + qcom,cmm-data-offset = <0>; + qcom,cmm-data-size = <0>; + + cam_vdig-supply = <&pm8226_l5>; + cam_vio-supply = <&pm8226_lvs1>; + qcom,cam-vreg-name = "cam_vdig", "cam_vio"; + qcom,cam-vreg-type = <0 1>; + qcom,cam-vreg-min-voltage = <1200000 0>; + qcom,cam-vreg-max-voltage = <1200000 0>; + qcom,cam-vreg-op-mode = <200000 0>; + qcom,gpio-no-mux = <0>; + gpios = <&msmgpio 26 0>, + <&msmgpio 37 0>, + <&msmgpio 36 0>; + qcom,gpio-reset = <1>; + qcom,gpio-standby = <2>; + qcom,gpio-req-tbl-num = <0 1 2>; + qcom,gpio-req-tbl-flags = <1 0 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK", + "CAM_RESET1", + "CAM_STANDBY"; + qcom,cam-power-seq-type = "sensor_vreg", + "sensor_vreg", "sensor_clk", + "sensor_gpio", "sensor_gpio"; + qcom,cam-power-seq-val = "cam_vdig", + "cam_vio", "sensor_cam_mclk", + "sensor_gpio_reset", + "sensor_gpio_standby"; + qcom,cam-power-seq-cfg-val = <1 1 24000000 1 1>; + qcom,cam-power-seq-delay = <1 1 5 5 10>; + }; + + diff --git a/Documentation/devicetree/bindings/media/video/msm-fd.txt b/Documentation/devicetree/bindings/media/video/msm-fd.txt new file mode 100644 index 000000000000..05635999a86a --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/msm-fd.txt @@ -0,0 +1,99 @@ +* Qualcomm Technologies, Inc. MSM FD + +Face detection hardware block. +The Face Detection Hardware Block will offload processing +on the host and also reduce power consumption. +Supports: +Front and back camera face detection concurrently. +Sizes: QVGA, VGA, WQVGA, WVGA at 20 pix minimum face size. + +Required properties: + +- compatible: + - "qcom,face-detection" +- reg: offset and length of the register set for the device. +- reg-names: should specify relevant names to each reg property defined. + - "fd_core" - FD CORE hardware register set. + - "fd_misc" - FD MISC hardware register set. + - "fd_vbif" - FD VBIF hardware register set. +- interrupts: should contain the fd interrupts. From fd cores with + revisions 0x10010000 and higher, power collapse sequence is required. + Face detection misc irq is needed to perform power collapse. +- interrupt-names: should specify relevant names to each interrupts + property defined. +- vdd-supply: phandle to GDSC regulator controlling face detection hw. +- clocks: list of entries each of which contains: + - phandle to the clock controller. + - macro containing clock's name in hardware. +- clock-names: should specify relevant names to each clocks + property defined. + +Optional properties: + +- clock-rates: should specify clock rates in Hz to each clocks + property defined. + If we want to have different operating clock frequencies we can define + rate levels. They should be defined in incremental order. +- qcom,bus-bandwidth-vectors: Specifies instant and average bus bandwidth + vectors per clock rate. + Each of entries contains: + - ab. Average bus bandwidth (Bps). + - ib. Instantaneous bus bandwidth (Bps). +- mmagic-vdd-supply: phandle to GDSC regulator controlling mmagic. +- camss-vdd-supply: phandle to GDSC regulator controlling camss. +- qcom,fd-core-reg-settings: relative address offsets and value pairs for + FD CORE registers and bit mask. + Format: <reg_addr_offset reg_value reg_mask> +- qcom,fd-misc-reg-settings: relative address offsets and value pairs for + FD MISC registers and bit mask. + Format: <reg_addr_offset reg_value reg_mask> +- qcom,fd-vbif-reg-settings: relative address offsets and value pairs for + FD VBIF registers and bit mask. + Format: <reg_addr_offset reg_value reg_mask> + +Example: + + qcom,fd@fd878000 { + compatible = "qcom,face-detection"; + reg = <0xfd878000 0x800>, + <0xfd87c000 0x800>, + <0xfd860000 0x1000>; + reg-names = "fd_core", "fd_misc", "fd_vbif"; + interrupts = <0 316 0>; + interrupt-names = "fd"; + mmagic-vdd-supply = <&gdsc_mmagic_camss>; + camss-vdd-supply = <&gdsc_camss_top>; + vdd-supply = <&gdsc_fd>; + qcom,vdd-names = "mmagic-vdd", "camss-vdd", "vdd"; + clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>, + <&clock_gcc clk_mmssnoc_axi_clk>, + <&clock_mmss clk_mmagic_camss_axi_clk>, + <&clock_mmss clk_camss_top_ahb_clk>, + <&clock_mmss clk_fd_core_clk_src>, + <&clock_mmss clk_fd_core_clk>, + <&clock_mmss clk_fd_core_uar_clk>, + <&clock_mmss clk_fd_ahb_clk>, + <&clock_mmss clk_smmu_cpp_axi_clk>, + <&clock_mmss clk_camss_ahb_clk>, + <&clock_mmss clk_camss_cpp_axi_clk>, + <&clock_mmss clk_camss_cpp_vbif_ahb_clk>, + <&clock_mmss clk_smmu_cpp_ahb_clk>; + clock-names = "mmss_mmagic_ahb_clk", "mmssnoc_axi_clk" , + "mmagic_camss_axi_clk", "camss_top_ahb_clk", + "fd_core_clk_src", "fd_core_clk", + "fd_core_uar_clk", "fd_ahb_clk", + "smmu_cpp_axi_clk", "camss_ahb_clk", + "camss_cpp_axi_clk", "cpp_vbif_ahb_clk", + "smmu_cpp_ahb_clk"; + clock-rates = <0 0 0 0 400000000 400000000 400000000 80000000 0 0 0 0 0>; + qcom,bus-bandwidth-vectors = <13000000 13000000>, + <45000000 45000000>, + <90000000 90000000>; + qcom,fd-vbif-reg-settings = <0x20 0x10000000 0x30000000>, + <0x24 0x10000000 0x30000000>, + <0x28 0x10000000 0x30000000>, + <0x2c 0x10000000 0x30000000>; + qcom,fd-misc-reg-settings = <0x20 0x2 0x3>, + <0x24 0x2 0x3>; + qcom,fd-core-reg-settings = <0x8 0x20 0xffffffff>; + }; diff --git a/Documentation/devicetree/bindings/media/video/msm-irqrouter.txt b/Documentation/devicetree/bindings/media/video/msm-irqrouter.txt new file mode 100644 index 000000000000..fbcb74d3b900 --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/msm-irqrouter.txt @@ -0,0 +1,18 @@ +* Qualcomm Technologies, Inc. MSM IRQ Router + +Required properties: +- cell-index: irq router hardware core index +- compatible : + - "qcom,irqrouter" +- reg : offset and length of the register set for the device + for the irqrouter operating in compatible mode. +- reg-names : should specify relevant names to each reg property defined. + +Example: + + qcom,irqrouter@0xfda0c000 { + cell-index = <0>; + compatible = "qcom,irqrouter"; + reg = <0xfda00000 0x100>; + reg-names = "irqrouter"; + }; diff --git a/Documentation/devicetree/bindings/media/video/msm-ispif.txt b/Documentation/devicetree/bindings/media/video/msm-ispif.txt index c4086df2b283..d635a4ed1ea0 100644 --- a/Documentation/devicetree/bindings/media/video/msm-ispif.txt +++ b/Documentation/devicetree/bindings/media/video/msm-ispif.txt @@ -1,4 +1,4 @@ -* Qualcomm MSM ISPIF +* Qualcomm Technologies, Inc. MSM ISPIF Required properties: - cell-index: ispif hardware core index diff --git a/Documentation/devicetree/bindings/media/video/msm-jpeg.txt b/Documentation/devicetree/bindings/media/video/msm-jpeg.txt new file mode 100644 index 000000000000..5aed7c3837ad --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/msm-jpeg.txt @@ -0,0 +1,140 @@ +* Qualcomm Technologies, Inc. MSM JPEG + +Required properties: +- cell-index: jpeg hardware core index +- compatible : + - "qcom,jpeg" + - "qcom,jpeg_dma" +- reg : offset and length of the register set of jpeg device and vbif device + for the jpeg operating in compatible mode. +- reg-names : should specify relevant names to each reg property defined. +- interrupts : should contain the jpeg interrupt. +- interrupt-names : should specify relevant names to each interrupts + property defined. +- clock-names : names of clocks required for the device. +- clocks : clocks required for the device. +- qcom, clock-rates: rates of the required clocks. +- vdd-supply: phandle to GDSC regulator controlling JPEG core. +- mmagic-vdd-supply: phandle to GDSC regulator controlling mmagic. +- camss-vdd-supply: phandle to GDSC regulator controlling camss. + +Optional properties: +- qcom,vbif-reg-settings: relative address offsets and value pairs for VBIF registers. +- qcom,qos-reg-settings: relative address offsets and value pairs for QoS registers. +- qcom,prefetch-reg-settings: relative address offsets and value pairs for + MMU prefetch registers. + +Example: + + qcom,jpeg@a1c000 { + cell-index = <0>; + compatible = "qcom,jpeg"; + reg = <0xa1c000 0x4000>, + <0xa60000 0x3000>; + reg-names = "jpeg"; + interrupts = <0 316 0>; + interrupt-names = "jpeg"; + mmagic-vdd-supply = <&gdsc_mmagic_camss>; + camss-vdd-supply = <&gdsc_camss_top>; + vdd-supply = <&gdsc_jpeg>; + qcom,vdd-names = "mmagic-vdd", "camss-vdd", "vdd"; + clock-names = "core_clk", "iface_clk", "bus_clk0", + "camss_top_ahb_clk", "camss_ahb_clk", "smmu_jpeg_axi_clk", + "mmss_mmagic_ahb_clk", "mmssnoc_axi_clk", + "mmagic_camss_axi_clk"; + clocks = <&clock_mmss clk_camss_jpeg0_clk>, + <&clock_mmss clk_camss_jpeg_ahb_clk>, + <&clock_mmss clk_camss_jpeg_axi_clk>, + <&clock_mmss clk_camss_top_ahb_clk>, + <&clock_mmss clk_camss_ahb_clk>, + <&clock_mmss clk_smmu_jpeg_axi_clk>, + <&clock_mmss clk_mmss_mmagic_ahb_clk>, + <&clock_gcc clk_mmssnoc_axi_clk>, + <&clock_mmss clk_mmagic_camss_axi_clk>; + qcom,clock-rates = <320000000 0 0 0 0 0 0 0 0>; + qcom,vbif-reg-settings = <0x4 0x1>, + <0xb0 0x00100010>, + <0xc0 0x10001000>; + qcom,qos-reg-settings = <0x28 0x00000008>; + qcom,prefetch-reg-settings = <0x30c 0x1111>, + <0x318 0x31>, + <0x324 0x31>, + <0x330 0x31>, + <0x33c 0x0>; + status = "ok"; + }; + + qcom,jpeg@a24000 { + cell-index = <2>; + compatible = "qcom,jpeg"; + reg = <0xa24000 0x4000>, + <0xa60000 0x3000>; + reg-names = "jpeg"; + interrupts = <0 318 0>; + interrupt-names = "jpeg"; + mmagic-vdd-supply = <&gdsc_mmagic_camss>; + camss-vdd-supply = <&gdsc_camss_top>; + vdd-supply = <&gdsc_jpeg>; + qcom,vdd-names = "mmagic-vdd", "camss-vdd", "vdd"; + clock-names = "core_clk", "iface_clk", "bus_clk0", + "camss_top_ahb_clk", "camss_ahb_clk", "smmu_jpeg_axi_clk", + "mmss_mmagic_ahb_clk", "mmssnoc_axi_clk", + "mmagic_camss_axi_clk"; + clocks = <&clock_mmss clk_camss_jpeg2_clk>, + <&clock_mmss clk_camss_jpeg_ahb_clk>, + <&clock_mmss clk_camss_jpeg_axi_clk>, + <&clock_mmss clk_camss_top_ahb_clk>, + <&clock_mmss clk_camss_ahb_clk>, + <&clock_mmss clk_smmu_jpeg_axi_clk>, + <&clock_mmss clk_mmss_mmagic_ahb_clk>, + <&clock_gcc clk_mmssnoc_axi_clk>, + <&clock_mmss clk_mmagic_camss_axi_clk>; + qcom,clock-rates = <266670000 0 0 0 0 0 0 0 0>; + qcom,vbif-reg-settings = <0x4 0x1>, + <0xb0 0x00100010>, + <0xc0 0x10001000>; + qcom,qos-reg-settings = <0x28 0x00000008>; + qcom,prefetch-reg-settings = <0x30c 0x1111>, + <0x318 0x0>, + <0x324 0x31>, + <0x330 0x31>, + <0x33c 0x31>; + status = "ok"; + }; + + qcom,jpeg@aa0000 { + cell-index = <3>; + compatible = "qcom,jpeg_dma"; + reg = <0xaa0000 0x4000>, + <0xa60000 0x3000>; + reg-names = "jpeg"; + interrupts = <0 304 0>; + interrupt-names = "jpeg"; + mmagic-vdd-supply = <&gdsc_mmagic_camss>; + camss-vdd-supply = <&gdsc_camss_top>; + vdd-supply = <&gdsc_jpeg>; + qcom,vdd-names = "mmagic-vdd", "camss-vdd", "vdd"; + clock-names = "core_clk", "iface_clk", "bus_clk0", + "camss_top_ahb_clk", "camss_ahb_clk", "smmu_jpeg_axi_clk", + "mmss_mmagic_ahb_clk", "mmssnoc_axi_clk", + "mmagic_camss_axi_clk"; + clocks = <&clock_mmss clk_camss_jpeg_dma_clk>, + <&clock_mmss clk_camss_jpeg_ahb_clk>, + <&clock_mmss clk_camss_jpeg_axi_clk>, + <&clock_mmss clk_camss_top_ahb_clk>, + <&clock_mmss clk_camss_ahb_clk>, + <&clock_mmss clk_smmu_jpeg_axi_clk>, + <&clock_mmss clk_mmss_mmagic_ahb_clk>, + <&clock_gcc clk_mmssnoc_axi_clk>, + <&clock_mmss clk_mmagic_camss_axi_clk>; + qcom,clock-rates = <266670000 0 0 0 0 0 0 0 0>; + qcom,vbif-reg-settings = <0x4 0x1>, + <0xb0 0x00100010>, + <0xc0 0x10001000>; + qcom,qos-reg-settings = <0x28 0x00000008>; + qcom,prefetch-reg-settings = <0x18c 0x11>, + <0x1a0 0x31>, + <0x1b0 0x31>; + status = "ok"; + }; + diff --git a/Documentation/devicetree/bindings/media/video/msm-jpegdma.txt b/Documentation/devicetree/bindings/media/video/msm-jpegdma.txt new file mode 100644 index 000000000000..035bd6a659d6 --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/msm-jpegdma.txt @@ -0,0 +1,62 @@ +* Qualcomm Technologies, Inc. MSM JPEG DMA + +Jpeg dma hardware block. + +Jpeg dma can replicate and downscale yuv frames. +Supported formats: Monochrome, NV12 and NV21. + +Required properties: +- compatible : "qcom,jpegdma". +- reg : offset and length of the register set of jpeg dma device and + vbif device for the jpeg dma operating in compatible mode. +- reg-names : should specify relevant names to each reg property defined. +- interrupts : should contain the jpeg interrupt. +- interrupt-names : should specify relevant names to each interrupts + property defined. +- mmagic-vdd-supply: phandle to GDSC regulator controlling mmagic. +- camss-vdd-supply: phandle to GDSC regulator controlling camss. +- clock-names : names of clocks required for the device. +- clocks : clocks required for the device. +- qcom,clock-rates: should specify clock rates in Hz to each clocks + property defined. +Optional properties: +- qcom,qos-regs: relative address offsets of QoS registers. +- qcom,qos-settings: QoS values to be written to QoS registers. +- qcom,vbif-regs: relative address offsets of VBIF registers. +- qcom,vbif-settings: VBIF values to be written to VBIF registers. +- qcom,prefetch-regs: relative address offsets of MMU prefetch registers. +- qcom,prefetch-settings: values to be written to MMU Prefetch registers. + +Example: + qcom,jpegdma@aa0000 { + compatible = "qcom,jpegdma"; + reg = <0xaa0000 0x4000>, + <0xa60000 0x3000>; + reg-names = "jpegdma_core", "jpeg_vbif"; + interrupts = <0 304 0>; + interrupt-names = "jpeg"; + mmagic-vdd-supply = <&gdsc_mmagic_camss>; + camss-vdd-supply = <&gdsc_camss_top>; + vdd-supply = <&gdsc_jpeg>; + qcom,vdd-names = "mmagic-vdd", "camss-vdd", "vdd"; + clock-names = "core_clk", "iface_clk", "bus_clk0", + "camss_top_ahb_clk", "camss_ahb_clk", "smmu_jpeg_axi_clk", + "mmss_mmagic_ahb_clk", "mmssnoc_axi_clk", + "mmagic_camss_axi_clk"; + clocks = <&clock_mmss clk_camss_jpeg_dma_clk>, + <&clock_mmss clk_camss_jpeg_ahb_clk>, + <&clock_mmss clk_camss_jpeg_axi_clk>, + <&clock_mmss clk_camss_top_ahb_clk>, + <&clock_mmss clk_camss_ahb_clk>, + <&clock_mmss clk_smmu_jpeg_axi_clk>, + <&clock_mmss clk_mmss_mmagic_ahb_clk>, + <&clock_gcc clk_mmssnoc_axi_clk>, + <&clock_mmss clk_mmagic_camss_axi_clk>; + qcom,clock-rates = <266670000 0 0 0 0 0 0 0 0>, + <400000000 0 0 0 0 0 0 0 0>; + qcom,vbif-regs = <0x4 0xDC 0x124 0x160>; + qcom,vbif-settings = <0x1 0x7 0x1 0x22222222>; + qcom,prefetch-regs = <0x18C 0x1A0 0x1B0>; + qcom,prefetch-settings = <0x11 0x31 0x31>; + status = "ok"; + }; diff --git a/Documentation/devicetree/bindings/media/video/msm-vfe.txt b/Documentation/devicetree/bindings/media/video/msm-vfe.txt index 39a4bd1601e6..dac22f30bf1d 100644 --- a/Documentation/devicetree/bindings/media/video/msm-vfe.txt +++ b/Documentation/devicetree/bindings/media/video/msm-vfe.txt @@ -1,4 +1,4 @@ -* Qualcomm MSM VFE +* Qualcomm Technologies, Inc. MSM VFE Required properties for parent node: - compatible : diff --git a/Documentation/devicetree/bindings/media/video/msm-vpu.txt b/Documentation/devicetree/bindings/media/video/msm-vpu.txt new file mode 100644 index 000000000000..6aea66b500dc --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/msm-vpu.txt @@ -0,0 +1,60 @@ +* Qualcomm Technologies, Inc. MSM VPU + +VPU (Video Processing Unit) applies high quality video post-processing +functions like noise reduction, deinterlacing, scaling, etc in real-time +on streaming video. + + +Required properties: +- compatible: + - "qcom,vpu" +- reg: Specify offset and length of the device register sets. +- reg-names: Names corresponding to the defined register sets. + - "vpu_csr": CSR registers + - "vpu_smem": Shared memory + - "vpu_vbif": VBIF registers (optional) +- interrupts: Specify the vpu interrupts. +- interrupt-names: Names corresponding to the defined interrupts list. + - "vpu_wdog": Watchdog interrupt + - "vpu_hfi": Firmware to Host interrupt +- clock-names: Array of clocks that the driver requires for the device. + The names here correspond to the clock names used in clk_get(<name>). +- qcom,bus-load-vector-tbl: Vectors of <load, ab, ib>. The (ab,ib) pairs are + ddr bus bandwidths to be requested at corresponding video processing load. + Vectors should be in ascending order of load, and their number is variable. +- vdd-supply: regulator that supplies the vpu. + +Optional properties: +- qcom,enabled-iommu-maps: List of IOMMU maps to be enabled, defined by name. + If this property is not defined or invalid, then device assumes contiguous + buffers. Valid iommu names are: + - "vpu_nonsecure": IOMMU for accessing non-secure video buffers. + - "vpu_secure": IOMMU for accessing secure video buffers. + - "vpu_firmware": IOMMU for loading firmware image. +- qcom,vbif-reg-presets: List of offset-value pairs for VBIF registers to be + programmed. The offsets are from the base register specified in 'vpu_vbif'. + This is used to program default register values for QoS settings, etc. + +Example: + qcom,vpu@fdc00000 { + compatible = "qcom,vpu"; + reg = <0xfdc00000 0xff000>, + <0xbfe00000 0x100000>; + reg-names = "vpu_csr", "vpu_smem"; + interrupts = <0 44 0>, <0 45 0>; + interrupt-names = "vpu_wdog", "vpu_hfi"; + clock-names = "core_clk", "bus_clock", "iface_clk"; + qcom,maple-clk-load-freq-tbl = <100000 50000000>, + <500000 400000000>; + qcom,vdp-clk-load-freq-tbl = <200000 100000000>, + <400000 320000000>; + qcom,bus-clk-load-freq-tbl = <100000 40000000>, + <200000 80000000>; + qcom,bus-load-vector-tbl = <0 0 0>, + <489600 536000 1600000>, + <979200 2024000 1600000>; + qcom,enabled-iommu-maps = "vpu_nonsecure", "vpu_secure"; + qcom,vbif-reg-presets = <0xb0138 0x43ff>, + <0xb0178 0xff12350e>; + vdd-supply = <&gdsc_vpu>; + }; diff --git a/Documentation/devicetree/bindings/media/video/ovti-image-sensor.txt b/Documentation/devicetree/bindings/media/video/ovti-image-sensor.txt new file mode 100644 index 000000000000..cef9cf5fcee5 --- /dev/null +++ b/Documentation/devicetree/bindings/media/video/ovti-image-sensor.txt @@ -0,0 +1,9 @@ +OmniVision Image Sensor Device Tree Bindings. +======================================== + +Boards with the OmniVision Image Sensor shall have the following properties: + +Required root node properties: + - compatible: + - "ovti,ov8865" : OmniVision OV8865 8 megapixel Image Sensor. + - "ovti,ov5648" : OmniVision OV5648 5 megapixel Image Sensor. |