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-rw-r--r--Documentation/devicetree/bindings/arm/msm/msm.txt2
-rw-r--r--Documentation/devicetree/bindings/clock/qcom,gpucc.txt3
-rw-r--r--Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt6
-rw-r--r--Documentation/devicetree/bindings/gpu/adreno.txt2
-rw-r--r--Documentation/devicetree/bindings/input/qpnp-power-on.txt13
-rw-r--r--Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt4
-rw-r--r--Documentation/devicetree/bindings/regulator/cpr4-apss-regulator.txt10
-rw-r--r--Documentation/devicetree/bindings/regulator/msm_gfx_ldo.txt17
-rw-r--r--Documentation/devicetree/bindings/regulator/qpnp-lcdb-regulator.txt250
-rw-r--r--Documentation/devicetree/bindings/usb/msm-phy.txt1
-rw-r--r--Documentation/devicetree/bindings/usb/msm-ssusb.txt5
11 files changed, 295 insertions, 18 deletions
diff --git a/Documentation/devicetree/bindings/arm/msm/msm.txt b/Documentation/devicetree/bindings/arm/msm/msm.txt
index de99a5636ef3..ce7bfa24490a 100644
--- a/Documentation/devicetree/bindings/arm/msm/msm.txt
+++ b/Documentation/devicetree/bindings/arm/msm/msm.txt
@@ -262,6 +262,8 @@ compatible = "qcom,msmhamster-cdp"
compatible = "qcom,msmhamster-mtp"
compatible = "qcom,msmfalcon-sim"
compatible = "qcom,msmfalcon-rumi"
+compatible = "qcom,msmfalcon-cdp"
+compatible = "qcom,msmfalcon-mtp"
compatible = "qcom,msmtriton-rumi"
compatible = "qcom,msm8952-rumi"
compatible = "qcom,msm8952-sim"
diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.txt b/Documentation/devicetree/bindings/clock/qcom,gpucc.txt
index 9f8ea0d6ef8f..4d8f87225230 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gpucc.txt
+++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.txt
@@ -4,7 +4,8 @@ Qualcomm Technologies, Inc Graphics Clock & Reset Controller Binding
Required properties :
- compatible : shall contain only one of the following:
- "qcom,gpucc-msmfalcon"
+ "qcom,gpucc-msmfalcon",
+ "qcom,gpucc-msmtriton"
- reg : shall contain base register location and length
- #clock-cells : shall contain 1
diff --git a/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt b/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt
index 0174306135c1..a9bb6b81e60d 100644
--- a/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt
+++ b/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt
@@ -436,6 +436,11 @@ the fps window.
- qcom,cmd-to-video-mode-switch-commands: List of commands that need to be sent
to panel in order to switch from command mode to video mode dynamically.
Refer to "qcom,mdss-dsi-on-command" section for adding commands.
+- qcom,mode-switch-commands-state: String that specifies the ctrl state for sending commands to switch
+ the panel mode, it applies for both switches, from command to video and
+ from video to command.
+ "dsi_lp_mode" = DSI low power mode (default)
+ "dsi_hs_mode" = DSI high speed mode
- qcom,send-pps-before-switch: Boolean propety to indicate when PPS commands should be sent,
either before or after switch commands during dynamic resolution
switch in DSC panels. If the property is not present, the default
@@ -665,6 +670,7 @@ Example:
qcom,video-to-cmd-mode-switch-commands = [15 01 00 00 00 00 02 C2 0B
15 01 00 00 00 00 02 C2 08];
qcom,cmd-to-video-mode-switch-commands = [15 01 00 00 00 00 02 C2 03];
+ qcom,mode-switch-commands-state = "dsi_hs_mode";
qcom,send-pps-before-switch;
qcom,panel-ack-disabled;
qcom,mdss-dsi-horizontal-line-idle = <0 40 256>,
diff --git a/Documentation/devicetree/bindings/gpu/adreno.txt b/Documentation/devicetree/bindings/gpu/adreno.txt
index 8a79626125d9..f5ae85d27692 100644
--- a/Documentation/devicetree/bindings/gpu/adreno.txt
+++ b/Documentation/devicetree/bindings/gpu/adreno.txt
@@ -187,7 +187,7 @@ Documentation/devicetree/bindings/coresight/coresight.txt
- coresight-child-list List of phandles pointing to the children of this
component.
- coresight-child-ports List of input port numbers of the children.
-
+- coresight-atid The unique ATID value of the coresight device
Example of A330 GPU in MSM8916:
diff --git a/Documentation/devicetree/bindings/input/qpnp-power-on.txt b/Documentation/devicetree/bindings/input/qpnp-power-on.txt
index 5b364d0a77ba..a596aa1c595d 100644
--- a/Documentation/devicetree/bindings/input/qpnp-power-on.txt
+++ b/Documentation/devicetree/bindings/input/qpnp-power-on.txt
@@ -24,11 +24,14 @@ Required properties:
Optional properties:
- qcom,pon-dbc-delay The debounce delay for the power-key interrupt
- specified in us. The value ranges from 2
- seconds to 1/64 of a second. Possible values
- are:
- - 2, 1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64
- - Intermediate value is rounded down to the
+ specified in us.
+ Possible values for GEN1 PON are:
+ 15625, 31250, 62500, 125000, 250000, 500000,
+ 1000000 and 2000000.
+ Possible values for GEN2 PON are:
+ 62, 123, 245, 489, 977, 1954, 3907, 7813,
+ 15625, 31250, 62500, 125000 and 250000.
+ Intermediate value is rounded down to the
nearest valid value.
- qcom,pon_1 ...pon_n These represent the child nodes which describe
the properties (reset, key) for each of the pon
diff --git a/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt b/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
index 54a3c5689b9c..be5633024986 100644
--- a/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
+++ b/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
@@ -16,6 +16,8 @@ Required properties:
If "halt_base" is in same 4K pages this register then
this will be defined else "halt_q6", "halt_modem",
"halt_nc" is required.
+ "cxip_lm_vote_clear" needs to defined , in case PIL has to
+ clear the CX Ipeak bit if it was set by MSS.
- interrupts: The modem watchdog interrupt
- vdd_cx-supply: Reference to the regulator that supplies the vdd_cx domain.
- vdd_cx-voltage: Voltage corner/level(max) for cx rail.
@@ -84,6 +86,8 @@ Optional properties:
wordline clamp, and compiler memory clamp during MSS restart.
- qcom,qdsp6v56-1-10: Boolean- Present if the qdsp version is v56 1.10
- qcom,override-acc-1: Override the default ACC settings with this value if present.
+- qcom,cx-ipeak-vote: Boolean- Present if we need to set bit 5 of cxip_lm_vote_clear
+ during modem shutdown
Example:
qcom,mss@fc880000 {
diff --git a/Documentation/devicetree/bindings/regulator/cpr4-apss-regulator.txt b/Documentation/devicetree/bindings/regulator/cpr4-apss-regulator.txt
index 891feb571157..29bb2d32bf91 100644
--- a/Documentation/devicetree/bindings/regulator/cpr4-apss-regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/cpr4-apss-regulator.txt
@@ -36,7 +36,7 @@ APSS specific properties:
Usage: required
Value type: <string>
Definition: should be one of the following:
- "qcom,cpr4-msmtitanium-apss-regulator";
+ "qcom,cpr4-msm8953-apss-regulator";
- interrupts
Usage: required
@@ -357,7 +357,7 @@ APSS specific properties:
Each tuple list must contain a number of tuples equal to
2 to the power of the number of bits selected for misc
- voltage adj fuse definition. For MSMTITANIUM the tuple
+ voltage adj fuse definition. For MSM8953 the tuple
list must contain 2 tuples for the 1-bit misc fuse.
Tuples in a list should be specified in ascending order
according to the misc fuse value assuming that the fuse
@@ -373,7 +373,7 @@ Example
=======
apc_cpr: cpr4-ctrl@b018000 {
- compatible = "qcom,cpr4-msmtitanium-apss-regulator";
+ compatible = "qcom,cpr4-msm8953-apss-regulator";
reg = <0xb018000 0x4000>, <0xa4000 0x1000>;
reg-names = "cpr_ctrl", "fuse_base";
interrupts = <GIC_SPI 15 IRQ_TYPE_EDGE_RISING>;
@@ -394,9 +394,9 @@ apc_cpr: cpr4-ctrl@b018000 {
qcom,apm-threshold-voltage = <848000>;
qcom,apm-hysteresis-voltage = <5000>;
- vdd-supply = <&pmtitanium_s5>;
+ vdd-supply = <&pm8953_s5>;
qcom,voltage-step = <5000>;
- vdd-limit-supply = <&pmtitanium_s5_limit>;
+ vdd-limit-supply = <&pm8953_s5_limit>;
mem-acc-supply = <&apc_mem_acc_vreg>;
qcom,cpr-enable;
diff --git a/Documentation/devicetree/bindings/regulator/msm_gfx_ldo.txt b/Documentation/devicetree/bindings/regulator/msm_gfx_ldo.txt
index f8b243e5509d..890255749704 100644
--- a/Documentation/devicetree/bindings/regulator/msm_gfx_ldo.txt
+++ b/Documentation/devicetree/bindings/regulator/msm_gfx_ldo.txt
@@ -1,6 +1,6 @@
Qualcomm Technologies, Inc. GFX LDO for Graphics
-The GPU core on MSM TITANIUM can be powered by an internal (on-die)
+The GPU core on MSM 8953 can be powered by an internal (on-die)
MSM LDO or BHS based on its operating corner.
This document describes the bindings that apply for the GFX LDO regulator.
@@ -8,7 +8,7 @@ This document describes the bindings that apply for the GFX LDO regulator.
- compatible
Usage: required
Value type: <string>
- Definition: should be "qcom,msmtitanium-gfx-ldo" for MSMTITANIUM.
+ Definition: should be "qcom,msm8953-gfx-ldo" for MSM8953.
- reg
Usage: required
@@ -103,12 +103,20 @@ This document describes the bindings that apply for the GFX LDO regulator.
corner value for each gfx corner. The elements in the array
are ordered from lowest voltage corner to highest voltage corner.
+- qcom,ldo-init-voltage-adjustment
+ Usage: optional
+ Value type: <prop-encoded-aray>
+ Definition: Array of voltages in microvolts which indicate the static
+ adjustment to be applied to the open-loop voltages for the
+ LDO supported corners. The length of this property must be
+ equal to qcom,num-ldo-corners.
+
=======
Example
=======
gfx_vreg_corner: ldo@0185f000 {
- compatible = "qcom,msmtitanium-gfx-ldo";
+ compatible = "qcom,msm8953-gfx-ldo";
reg = <0x0185f000 0x30>, <0xa0000 0x1000>;
reg-names = "ldo_addr", "efuse_addr";
@@ -124,7 +132,7 @@ Example
qcom,ldo-enable-corner-map = <1 1 1 0 0 0 0>;
qcom,init-corner = <5>;
- vdd-cx-supply = <&pmtitanium_s2_level>;
+ vdd-cx-supply = <&pm8953_s2_level>;
qcom,vdd-cx-corner-map = <RPM_SMD_REGULATOR_LEVEL_LOW_SVS>,
<RPM_SMD_REGULATOR_LEVEL_LOW_SVS>,
<RPM_SMD_REGULATOR_LEVEL_LOW_SVS>,
@@ -135,4 +143,5 @@ Example
mem-acc-supply = <&gfx_mem_acc>;
qcom,mem-acc-corner-map = <1 1 2 2 2 2 2>;
+ qcom,ldo-init-voltage-adjustment = <10000 20000 30000>;
};
diff --git a/Documentation/devicetree/bindings/regulator/qpnp-lcdb-regulator.txt b/Documentation/devicetree/bindings/regulator/qpnp-lcdb-regulator.txt
new file mode 100644
index 000000000000..68d23d0f5523
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/qpnp-lcdb-regulator.txt
@@ -0,0 +1,250 @@
+QPNP LCDB (LCD Bias) Regulator
+
+QPNP LCDB module provides voltage bias to the LCD display panel. The biases
+are positive (VDISP - supported by LDO) and negative (VDISN - supported by
+NCP) voltage signals. The module also supports TTW (touch-to-wake) capability.
+
+This document describes the bindings for QPNP LCDB module.
+
+=======================
+Required Node Structure
+=======================
+
+LCDB module must be described in two level of device nodes.
+
+==============================
+First Level Node - LCDB module
+==============================
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: should be "qcom,qpnp-lcdb-regulator"
+
+- reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: Base address of the LCDB SPMI peripheral.
+
+Touch-to-wake (TTW) properties:
+
+TTW supports 2 modes of operation - HW and SW. In the HW mode the enable/disable
+logic is controlled by an external signal (pin) where as in the SW mode it is
+is controlled by a pre-configured timer (ton/toff) programmed in the TTW
+register.
+
+Properties below are specific to TTW mode only. They are sepecified in the
+main node.
+
+- qcom,ttw-enable
+ Usage: optional
+ Value type: <bool>
+ Definition: Touch to wake-up support enabled.
+
+- qcom,ttw-mode-sw
+ Usage: optional
+ Value type: <bool>
+ Definition: Touch to wake supported in SW mode.
+ If not defined, ttw is enabled by HW pin.
+
+- qcom,attw-toff-ms
+ Usage: required if 'qcom,ttw-mode-sw' is true.
+ Value type: <bool>
+ Definition: Off time (in mS) for the VDISP/VDISN signals.
+ Possible values are 4, 8, 16, 32.
+
+- qcom,attw-ton-ms
+ Usage: required if 'qcom,ttw-mode-sw' is true.
+ Value type: <bool>
+ Definition: ON time (in mS) for the VDISP/VDISN signals.
+ Possible values are 4, 8, 16, 32.
+
+
+========================================
+Second Level Nodes - LDO/NCP/BOOST block
+========================================
+
+LDO / NCP subnode common properties:
+
+Properties below are common to the LDO and NCP bias.
+
+- label
+ Usage: required
+ Value type: <string>
+ Definition: A string used to describe the bias type.
+ Possible values are ldo, ncp, bst.
+
+- regulator-name
+ Usage: required
+ Value type: <string>
+ Definition: A string used to describe the regulator.
+
+- regulator-min-microvolt
+ Usage: required
+ Value type: <u32>
+ Definition: Minimum voltage (in uV) supported by the bias.
+
+- regulator-max-microvolt
+ Usage: required
+ Value type: <u32>
+ Definition: Maximum voltage (in uV) supported by the bias.
+
+
+LDO subnode properties:
+
+Properties below are specific to LDO bias only.
+
+- qcom,ldo-voltage-mv
+ Usage: optional
+ Value type: <u32>
+ Definition: Voltage (in mV) progammed for the LDO (VDISP).
+ Possile values are 4000mV to 6000mV. The range
+ 4000mV to 4900mV is in 100mV steps and 4900mV to
+ 6000mV is in 50mV steps.
+
+- qcom,ldo-pd
+ Usage: optional
+ Value type: <u32>
+ Definition: Pull-down configuration of LDO. Possible values are:
+ 1 - Enable pull-down
+ 0 - Disable pull-down
+
+- qcom,ldo-pd-strength
+ Usage: optional
+ Value type: <u32>
+ Definition: Pull-down strength. Possible values are:
+ 0 - Weak pull-down
+ 1 - Strong pull-down
+
+- qcom,ldo-ilim-ma
+ Usage: optional
+ Value type: <u32>
+ Definition: Current limit (in mA) of the LDO bias.
+ Possible values are 110, 160, 210, 260, 310, 360, 410, 460.
+
+- qcom,ldo-soft-start-us
+ Usage: optional
+ Value type: <u32>
+ Definition: Soft-start time (in uS) of the LDO bias.
+ Possible values are 0, 500, 1000, 2000.
+
+
+NCP subnode properties:
+
+Properties below are specific to NCP bias only.
+
+- qcom,ncp-voltage-mv
+ Usage: optional
+ Value type: <u32>
+ Definition: Voltage (in mV) progammed for the NCP (VDISN).
+ Possile values are 4000mV to 6000mV. The range
+ 4000mV to 4900mV is in 100mV steps and 4900mV to
+ 6000mV is in 50mV steps.
+
+- qcom,ncp-pd
+ Usage: optional
+ Value type: <u32>
+ Definition: Pull-down configuration of NCP. Possible values are:
+ 1 - Enable pull-down
+ 0 - Disable pull-down
+
+- qcom,ncp-pd-strength
+ Usage: optional
+ Value type: <u32>
+ Definition: Pull-down strength. Possible values are:
+ 0 - Weak pull-down
+ 1 - Strong pull-down
+
+- qcom,ncp-ilim-ma
+ Usage: optional
+ Value type: <u32>
+ Definition: Current limit (in mA) of the NCP bias.
+ Possible values are 260, 460, 640, 810.
+
+- qcom,ncp-soft-start-us
+ Usage: optional
+ Value type: <u32>
+ Definition: Soft-start time (in uS) of the NCP bias.
+ Possible values are 0, 500, 1000, 2000.
+
+
+BOOST subnode properties:
+
+Properties below are specific to BOOST subnode only.
+
+- qcom,bst-pd
+ Usage: optional
+ Value type: <bool>
+ Definition: Pull-down configuration of BOOST. Possible values are:
+ 1 - Enable pull-down
+ 0 - Disable pull-down
+
+- qcom,bst-pd-strength
+ Usage: optional
+ Value type: <u32>
+ Definition: Pull-down strength. Possible values are:
+ 0 - Weak pull-down
+ 1 - Strong pull-down
+
+- qcom,bst-ps
+ Usage: optional
+ Value type: <u32>
+ Definition: Pulse-skip configuration for boost. Possible values are:
+ 1 - Enable Pulse-skip
+ 0 - Disable Pulse-skip
+
+- qcom,bst-ps-threshold-ma
+ Usage: optional
+ Value type: <u32>
+ Definition: Current threshold (in mA) at which pulse-skip is entered.
+ Possible values are 50, 60, 70, 80.
+
+- qcom,bst-ilim-ma
+ Usage: optional
+ Value type: <u32>
+ Definition: Current limit (in mA) of the BOOST rail.
+ Possible values are 200 to 1600mA in 200mA steps.
+
+=======
+Example
+=======
+
+pm2falcon_lcdb: qpnp-lcdb@ec00 {
+ compatible = "qcom,qpnp-lcdb-regulator";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0xec00 0x100>;
+
+ qcom,ttw-enable;
+
+ lcdb_ldo_vreg: ldo {
+ label = "ldo";
+ regulator-name = "lcdb_ldo";
+ regulator-min-microvolt = <4000000>;
+ regulator-max-microvolt = <6000000>;
+
+ qcom,ldo-voltage-mv = <5400>;
+ qcom,ldo-pd = <1>;
+ qcom,ldo-pd-strength = <1>;
+ };
+
+ lcdb_ncp_vreg: ncp {
+ label = "ncp";
+ regulator-name = "lcdb_ncp";
+ regulator-min-microvolt = <4000000>;
+ regulator-max-microvolt = <6000000>;
+
+ qcom,ncp-voltage-mv = <5400>;
+ qcom,ncp-pd = <1>;
+ qcom,ncp-pd-strength = <1>;
+ };
+
+ lcdb_bst: bst {
+ label = "bst";
+
+ qcom,bst-pd = <1>;
+ qcom,bst-pd-strength = <1>;
+ qcom,bst-ps = <1>;
+ qcom,bst-ps-threshold-ma = <50>;
+ };
+};
diff --git a/Documentation/devicetree/bindings/usb/msm-phy.txt b/Documentation/devicetree/bindings/usb/msm-phy.txt
index b45ee910258e..032f07535415 100644
--- a/Documentation/devicetree/bindings/usb/msm-phy.txt
+++ b/Documentation/devicetree/bindings/usb/msm-phy.txt
@@ -178,6 +178,7 @@ Required properties:
"vdd" : vdd supply for digital circuit operation
"vdda18" : 1.8v high-voltage analog supply
"vdda33" : 3.3v high-voltage analog supply
+ "vdda12" : 1.2v high-voltage analog supply
- qcom,vdd-voltage-level: This property must be a list of three integer
values (no, min, max) where each value represents either a voltage in
microvolts or a value corresponding to voltage corner
diff --git a/Documentation/devicetree/bindings/usb/msm-ssusb.txt b/Documentation/devicetree/bindings/usb/msm-ssusb.txt
index f4d10908f4ff..1c870acbd034 100644
--- a/Documentation/devicetree/bindings/usb/msm-ssusb.txt
+++ b/Documentation/devicetree/bindings/usb/msm-ssusb.txt
@@ -39,7 +39,7 @@ Optional properties :
- clocks: a list of phandles to the controller clocks. Use as per
Documentation/devicetree/bindings/clock/clock-bindings.txt
- clock-names: Names of the clocks in 1-1 correspondence with the "clocks"
- property. Optional clocks are "bus_aggr_clk" and "cfg_ahb_clk".
+ property. Optional clocks are "bus_aggr_clk", "noc_aggr_clk" and "cfg_ahb_clk".
- qcom,charging-disabled: If present then battery charging using USB
is disabled.
- vbus_dwc3-supply: phandle to the 5V VBUS supply regulator used for host mode.
@@ -95,12 +95,13 @@ Example MSM USB3.0 controller device node :
clocks = <&clock_gcc clk_gcc_usb30_master_clk>,
<&clock_gcc clk_gcc_cfg_noc_usb3_axi_clk>,
<&clock_gcc clk_gcc_aggre1_usb3_axi_clk>,
+ <&clock_rpmcc RPM_AGGR2_NOC_CLK>,
<&clock_gcc clk_gcc_usb30_mock_utmi_clk>,
<&clock_gcc clk_gcc_usb30_sleep_clk>,
<&clock_gcc clk_gcc_usb_phy_cfg_ahb2phy_clk>,
<&clock_gcc clk_cxo_dwc3_clk>;
- clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
+ clock-names = "core_clk", "iface_clk", "bus_aggr_clk", "noc_aggr_clk",
"utmi_clk", "sleep_clk", "cfg_ahb_clk", "xo";
resets = <&clock_gcc GCC_USB_30_BCR>;