diff options
Diffstat (limited to 'arch/mips/ath79/irq.c')
| -rw-r--r-- | arch/mips/ath79/irq.c | 187 |
1 files changed, 128 insertions, 59 deletions
diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c index 90d09fc15398..9c0e1761773f 100644 --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c @@ -35,44 +35,17 @@ static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc) pending = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS) & __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); - if (pending & MISC_INT_UART) - generic_handle_irq(ATH79_MISC_IRQ_UART); - - else if (pending & MISC_INT_DMA) - generic_handle_irq(ATH79_MISC_IRQ_DMA); - - else if (pending & MISC_INT_PERFC) - generic_handle_irq(ATH79_MISC_IRQ_PERFC); - - else if (pending & MISC_INT_TIMER) - generic_handle_irq(ATH79_MISC_IRQ_TIMER); - - else if (pending & MISC_INT_TIMER2) - generic_handle_irq(ATH79_MISC_IRQ_TIMER2); - - else if (pending & MISC_INT_TIMER3) - generic_handle_irq(ATH79_MISC_IRQ_TIMER3); - - else if (pending & MISC_INT_TIMER4) - generic_handle_irq(ATH79_MISC_IRQ_TIMER4); - - else if (pending & MISC_INT_OHCI) - generic_handle_irq(ATH79_MISC_IRQ_OHCI); - - else if (pending & MISC_INT_ERROR) - generic_handle_irq(ATH79_MISC_IRQ_ERROR); - - else if (pending & MISC_INT_GPIO) - generic_handle_irq(ATH79_MISC_IRQ_GPIO); - - else if (pending & MISC_INT_WDOG) - generic_handle_irq(ATH79_MISC_IRQ_WDOG); + if (!pending) { + spurious_interrupt(); + return; + } - else if (pending & MISC_INT_ETHSW) - generic_handle_irq(ATH79_MISC_IRQ_ETHSW); + while (pending) { + int bit = __ffs(pending); - else - spurious_interrupt(); + generic_handle_irq(ATH79_MISC_IRQ(bit)); + pending &= ~BIT(bit); + } } static void ar71xx_misc_irq_unmask(struct irq_data *d) @@ -130,7 +103,10 @@ static void __init ath79_misc_irq_init(void) if (soc_is_ar71xx() || soc_is_ar913x()) ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask; - else if (soc_is_ar724x() || soc_is_ar933x() || soc_is_ar934x()) + else if (soc_is_ar724x() || + soc_is_ar933x() || + soc_is_ar934x() || + soc_is_qca955x()) ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; else BUG(); @@ -141,7 +117,7 @@ static void __init ath79_misc_irq_init(void) handle_level_irq); } - irq_set_chained_handler(ATH79_CPU_IRQ_MISC, ath79_misc_irq_handler); + irq_set_chained_handler(ATH79_CPU_IRQ(6), ath79_misc_irq_handler); } static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc) @@ -174,7 +150,89 @@ static void ar934x_ip2_irq_init(void) irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq); - irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar934x_ip2_irq_dispatch); + irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch); +} + +static void qca955x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc) +{ + u32 status; + + disable_irq_nosync(irq); + + status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS); + status &= QCA955X_EXT_INT_PCIE_RC1_ALL | QCA955X_EXT_INT_WMAC_ALL; + + if (status == 0) { + spurious_interrupt(); + goto enable; + } + + if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) { + /* TODO: flush DDR? */ + generic_handle_irq(ATH79_IP2_IRQ(0)); + } + + if (status & QCA955X_EXT_INT_WMAC_ALL) { + /* TODO: flush DDR? */ + generic_handle_irq(ATH79_IP2_IRQ(1)); + } + +enable: + enable_irq(irq); +} + +static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc) +{ + u32 status; + + disable_irq_nosync(irq); + + status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS); + status &= QCA955X_EXT_INT_PCIE_RC2_ALL | + QCA955X_EXT_INT_USB1 | + QCA955X_EXT_INT_USB2; + + if (status == 0) { + spurious_interrupt(); + goto enable; + } + + if (status & QCA955X_EXT_INT_USB1) { + /* TODO: flush DDR? */ + generic_handle_irq(ATH79_IP3_IRQ(0)); + } + + if (status & QCA955X_EXT_INT_USB2) { + /* TODO: flush DDR? */ + generic_handle_irq(ATH79_IP3_IRQ(1)); + } + + if (status & QCA955X_EXT_INT_PCIE_RC2_ALL) { + /* TODO: flush DDR? */ + generic_handle_irq(ATH79_IP3_IRQ(2)); + } + +enable: + enable_irq(irq); +} + +static void qca955x_irq_init(void) +{ + int i; + + for (i = ATH79_IP2_IRQ_BASE; + i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) + irq_set_chip_and_handler(i, &dummy_irq_chip, + handle_level_irq); + + irq_set_chained_handler(ATH79_CPU_IRQ(2), qca955x_ip2_irq_dispatch); + + for (i = ATH79_IP3_IRQ_BASE; + i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++) + irq_set_chip_and_handler(i, &dummy_irq_chip, + handle_level_irq); + + irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch); } asmlinkage void plat_irq_dispatch(void) @@ -184,22 +242,22 @@ asmlinkage void plat_irq_dispatch(void) pending = read_c0_status() & read_c0_cause() & ST0_IM; if (pending & STATUSF_IP7) - do_IRQ(ATH79_CPU_IRQ_TIMER); + do_IRQ(ATH79_CPU_IRQ(7)); else if (pending & STATUSF_IP2) ath79_ip2_handler(); else if (pending & STATUSF_IP4) - do_IRQ(ATH79_CPU_IRQ_GE0); + do_IRQ(ATH79_CPU_IRQ(4)); else if (pending & STATUSF_IP5) - do_IRQ(ATH79_CPU_IRQ_GE1); + do_IRQ(ATH79_CPU_IRQ(5)); else if (pending & STATUSF_IP3) ath79_ip3_handler(); else if (pending & STATUSF_IP6) - do_IRQ(ATH79_CPU_IRQ_MISC); + do_IRQ(ATH79_CPU_IRQ(6)); else spurious_interrupt(); @@ -212,63 +270,69 @@ asmlinkage void plat_irq_dispatch(void) * Issue a flush in the handlers to ensure that the driver sees * the update. */ + +static void ath79_default_ip2_handler(void) +{ + do_IRQ(ATH79_CPU_IRQ(2)); +} + +static void ath79_default_ip3_handler(void) +{ + do_IRQ(ATH79_CPU_IRQ(3)); +} + static void ar71xx_ip2_handler(void) { ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_PCI); - do_IRQ(ATH79_CPU_IRQ_IP2); + do_IRQ(ATH79_CPU_IRQ(2)); } static void ar724x_ip2_handler(void) { ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_PCIE); - do_IRQ(ATH79_CPU_IRQ_IP2); + do_IRQ(ATH79_CPU_IRQ(2)); } static void ar913x_ip2_handler(void) { ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_WMAC); - do_IRQ(ATH79_CPU_IRQ_IP2); + do_IRQ(ATH79_CPU_IRQ(2)); } static void ar933x_ip2_handler(void) { ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_WMAC); - do_IRQ(ATH79_CPU_IRQ_IP2); -} - -static void ar934x_ip2_handler(void) -{ - do_IRQ(ATH79_CPU_IRQ_IP2); + do_IRQ(ATH79_CPU_IRQ(2)); } static void ar71xx_ip3_handler(void) { ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_USB); - do_IRQ(ATH79_CPU_IRQ_USB); + do_IRQ(ATH79_CPU_IRQ(3)); } static void ar724x_ip3_handler(void) { ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_USB); - do_IRQ(ATH79_CPU_IRQ_USB); + do_IRQ(ATH79_CPU_IRQ(3)); } static void ar913x_ip3_handler(void) { ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_USB); - do_IRQ(ATH79_CPU_IRQ_USB); + do_IRQ(ATH79_CPU_IRQ(3)); } static void ar933x_ip3_handler(void) { ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_USB); - do_IRQ(ATH79_CPU_IRQ_USB); + do_IRQ(ATH79_CPU_IRQ(3)); } static void ar934x_ip3_handler(void) { ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_USB); - do_IRQ(ATH79_CPU_IRQ_USB); + do_IRQ(ATH79_CPU_IRQ(3)); } void __init arch_init_irq(void) @@ -286,16 +350,21 @@ void __init arch_init_irq(void) ath79_ip2_handler = ar933x_ip2_handler; ath79_ip3_handler = ar933x_ip3_handler; } else if (soc_is_ar934x()) { - ath79_ip2_handler = ar934x_ip2_handler; + ath79_ip2_handler = ath79_default_ip2_handler; ath79_ip3_handler = ar934x_ip3_handler; + } else if (soc_is_qca955x()) { + ath79_ip2_handler = ath79_default_ip2_handler; + ath79_ip3_handler = ath79_default_ip3_handler; } else { BUG(); } - cp0_perfcount_irq = ATH79_MISC_IRQ_PERFC; + cp0_perfcount_irq = ATH79_MISC_IRQ(5); mips_cpu_irq_init(); ath79_misc_irq_init(); if (soc_is_ar934x()) ar934x_ip2_irq_init(); + else if (soc_is_qca955x()) + qca955x_irq_init(); } |