diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt.dtsi | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi index 4e2c4b732c05..ca869dd1a9bc 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi @@ -1822,6 +1822,35 @@ }; }; + qcom_seecom: qseecom@86600000 { + compatible = "qcom,qseecom"; + reg = <0x86600000 0x2200000>; + reg-names = "secapp-region"; + qcom,hlos-num-ce-hw-instances = <1>; + qcom,hlos-ce-hw-instance = <0>; + qcom,qsee-ce-hw-instance = <0>; + qcom,disk-encrypt-pipe-pair = <2>; + qcom,support-fde; + qcom,no-clock-support; + qcom,appsbl-qseecom-support; + qcom,msm-bus,name = "qseecom-noc"; + qcom,msm-bus,num-cases = <4>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + <55 512 0 0>, + <55 512 0 0>, + <55 512 120000 1200000>, + <55 512 393600 3936000>; + clock-names = "core_clk_src", "core_clk", + "iface_clk", "bus_clk"; + clocks = <&clock_gcc clk_ce1_clk>, + <&clock_gcc clk_qseecom_ce1_clk>, + <&clock_gcc clk_gcc_ce1_ahb_m_clk>, + <&clock_gcc clk_gcc_ce1_axi_m_clk>; + qcom,ce-opp-freq = <171430000>; + qcom,qsee-reentrancy-support = <2>; + }; + mitigation_profile0: qcom,limit_info-0 { qcom,temperature-sensor = <&sensor_information1>; qcom,boot-frequency-mitigate; |