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path: root/drivers/phy/phy-qcom-ufs-qrbtc-v2.h
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Diffstat (limited to 'drivers/phy/phy-qcom-ufs-qrbtc-v2.h')
-rw-r--r--drivers/phy/phy-qcom-ufs-qrbtc-v2.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/phy/phy-qcom-ufs-qrbtc-v2.h b/drivers/phy/phy-qcom-ufs-qrbtc-v2.h
index 784d8a50bc0e..3de9a4dffd2a 100644
--- a/drivers/phy/phy-qcom-ufs-qrbtc-v2.h
+++ b/drivers/phy/phy-qcom-ufs-qrbtc-v2.h
@@ -62,6 +62,7 @@
/* QRBTC V2 USER REGISTERS */
#define U11_UFS_RESET_REG_OFFSET PHY_USR(0x4)
#define U11_QRBTC_CONTROL_OFFSET PHY_USR(0x18)
+#define U11_QRBTC_TX_CLK_CTRL PHY_USR(0x20)
static struct ufs_qcom_phy_calibration phy_cal_table_rate_A[] = {
UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_PHY_START_OFFSET, 0x00),
@@ -88,7 +89,7 @@ static struct ufs_qcom_phy_calibration phy_cal_table_rate_A[] = {
UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CP_SETI, 0x3B),
UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_IP_SETP, 0x0A),
UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CP_SETP, 0x04),
- UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PWM_CNTRL1, 0x8F),
+ UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PWM_CNTRL1, 0xCF),
UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PWM_CNTRL2, 0x61),
UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PWM_NDIV, 0x4F),
UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_CDR_CONTROL, 0xF2),